blob: cbfab6f97fbbc9c76fd633ebedc4f80672dbbdde [file] [log] [blame]
Hatim RV1b652072012-12-11 00:52:45 +00001/*
2 * SAMSUNG SMDK5250 board device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13/include/ ARCH_CPU_DTS
14
15/ {
16 model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
17 compatible = "samsung,smdk5250", "samsung,exynos5250";
18
Rajeshwari Shinde961a54c2012-12-26 20:03:09 +000019 aliases {
20 i2c0 = "/i2c@12c60000";
21 i2c1 = "/i2c@12c70000";
22 i2c2 = "/i2c@12c80000";
23 i2c3 = "/i2c@12c90000";
24 i2c4 = "/i2c@12ca0000";
25 i2c5 = "/i2c@12cb0000";
26 i2c6 = "/i2c@12cc0000";
27 i2c7 = "/i2c@12cd0000";
Rajeshwari Shinde2f269752012-12-26 20:03:21 +000028 spi0 = "/spi@12d20000";
29 spi1 = "/spi@12d30000";
30 spi2 = "/spi@12d40000";
31 spi3 = "/spi@131a0000";
32 spi4 = "/spi@131b0000";
Rajeshwari Shinde961a54c2012-12-26 20:03:09 +000033 };
34
Hatim RV1b652072012-12-11 00:52:45 +000035 sromc@12250000 {
36 bank = <1>;
37 srom-timing = <1 9 12 1 6 1 1>;
38 width = <2>;
39 lan@5000000 {
40 compatible = "smsc,lan9215", "smsc,lan";
41 reg = <0x5000000 0x100>;
42 phy-mode = "mii";
43 };
44 };
Rajeshwari Shinded1e8d2c2012-12-26 20:03:15 +000045
46 sound@12d60000 {
47 samsung,i2s-epll-clock-frequency = <192000000>;
48 samsung,i2s-sampling-rate = <48000>;
49 samsung,i2s-bits-per-sample = <16>;
50 samsung,i2s-channels = <2>;
51 samsung,i2s-lr-clk-framesize = <256>;
52 samsung,i2s-bit-clk-framesize = <32>;
53 samsung,codec-type = "wm8994";
54 };
55
56 i2c@12c70000 {
57 soundcodec@1a {
58 reg = <0x1a>;
59 compatible = "wolfson,wm8994-codec";
60 };
61 };
Rajeshwari Shindee00be0d2013-01-08 21:03:39 +000062
63 i2c@12c60000 {
64 pmic@9 {
65 reg = <0x9>;
66 compatible = "maxim,max77686_pmic";
67 };
68 };
Hatim RV1b652072012-12-11 00:52:45 +000069};