blob: 0668c256f3db82c7b97102f137b6f75212161167 [file] [log] [blame]
Tapani Utriainen550e3752013-12-04 09:27:33 +01001/*
2 * Maintainer :
3 * Tapani Utriainen <linuxfae@technexion.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7#include <common.h>
8#include <netdev.h>
9#include <twl4030.h>
10#include <asm/io.h>
11#include <asm/arch/mmc_host_def.h>
12#include <asm/arch/mem.h>
13#include <asm/arch/mux.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/arch/gpio.h>
16#include <asm/gpio.h>
17#include <asm/mach-types.h>
18
19#include <usb.h>
20#include <asm/ehci-omap.h>
21
22#include "tao3530.h"
23
24DECLARE_GLOBAL_DATA_PTR;
25
26int tao3530_revision(void)
27{
28 int ret = 0;
29
30 /* char *label argument is unused in gpio_request() */
31 ret = gpio_request(65, "");
32 if (ret) {
33 puts("Error: GPIO 65 not available\n");
34 goto out;
35 }
36 MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4));
37
38 ret = gpio_request(1, "");
39 if (ret) {
40 puts("Error: GPIO 1 not available\n");
41 goto out2;
42 }
43 MUX_VAL(CP(SYS_CLKREQ), (IEN | PTU | EN | M4));
44
45 ret = gpio_direction_input(65);
46 if (ret) {
47 puts("Error: GPIO 65 not available for input\n");
48 goto out3;
49 }
50
51 ret = gpio_direction_input(1);
52 if (ret) {
53 puts("Error: GPIO 1 not available for input\n");
54 goto out3;
55 }
56
57 ret = gpio_get_value(65) << 1 | gpio_get_value(1);
58
59out3:
60 MUX_VAL(CP(SYS_CLKREQ), (IEN | PTU | EN | M0));
61 gpio_free(1);
62out2:
63 MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0));
64 gpio_free(65);
65out:
66
67 return ret;
68}
69
70/*
71 * Routine: board_init
72 * Description: Early hardware init.
73 */
74int board_init(void)
75{
76 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
77 /* board id for Linux */
78 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_TAO3530;
79 /* boot param addr */
80 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
81
82 return 0;
83}
84
85/*
86 * Routine: misc_init_r
87 * Description: Configure board specific parts
88 */
89int misc_init_r(void)
90{
91 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
92 struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
93
94 twl4030_power_init();
95 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
96
97 /* Configure GPIOs to output */
98 /* GPIO23 */
99 writel(~(GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
100 writel(~(GPIO31 | GPIO30 | GPIO22 | GPIO21 |
101 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
102
103 /* Set GPIOs */
104 writel(GPIO10 | GPIO8 | GPIO2 | GPIO1,
105 &gpio6_base->setdataout);
106 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
107 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
108
109 dieid_num_r();
110
111 /* Set memory size environment variable, depending on revision */
112 switch (tao3530_revision()) {
113 case 0x2: /* Rev C1 -- 256MB */
114 setenv("mem_size", "mem=256M");
115 break;
116 case 0x3: /* Rev A2/B2 -- 128MB */
117 setenv("mem_size", "mem=128M");
118 break;
119 default:
120 printf("Warning: Unknown TAO3530 rev, setting mem=128M\n");
121 }
122
123 return 0;
124}
125
126/*
127 * Routine: set_muxconf_regs
128 * Description: Setting up the configuration Mux registers specific to the
129 * hardware. Many pins need to be moved from protect to primary
130 * mode.
131 */
132void set_muxconf_regs(void)
133{
134 MUX_TAO3530();
135}
136
137#ifdef CONFIG_GENERIC_MMC
138int board_mmc_init(bd_t *bis)
139{
140 omap_mmc_init(0, 0, 0, -1, -1);
141
142 return 0;
143}
144#endif
145
146#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
147/* Call usb_stop() before starting the kernel */
148void show_boot_progress(int val)
149{
150 if (val == BOOTSTAGE_ID_RUN_OS)
151 usb_stop();
152}
153
154static struct omap_usbhs_board_data usbhs_bdata = {
155 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
156 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
157 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
158};
159
160int ehci_hcd_init(int index, enum usb_init_type init,
161 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
162{
163 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
164}
165
166int ehci_hcd_stop(int index)
167{
168 return omap_ehci_hcd_stop();
169}
170#endif /* CONFIG_USB_EHCI */