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Mark Jackson13b50fe2008-07-30 13:07:27 +01001/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#include <common.h>
Ben Warren89973f82008-08-31 22:22:04 -070023#include <netdev.h>
Mark Jackson13b50fe2008-07-30 13:07:27 +010024
25#include <asm/io.h>
26#include <asm/sdram.h>
27#include <asm/arch/clk.h>
28#include <asm/arch/gpio.h>
29#include <asm/arch/hmatrix.h>
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020030#include <asm/arch/portmux.h>
Mark Jacksonf68378d2009-07-21 11:35:22 +010031#include <atmel_lcdc.h>
Mark Jackson13b50fe2008-07-30 13:07:27 +010032#include <lcd.h>
33
Mark Jackson58a518c2009-02-13 15:48:18 +000034#include "../../../cpu/at32ap/hsmc3.h"
35
Mark Jacksonf68378d2009-07-21 11:35:22 +010036#if defined(CONFIG_LCD)
37/* 480x272x16 @ 72 Hz */
38vidinfo_t panel_info = {
Anatolij Gustschinbcf0b522009-07-26 11:04:59 +020039 .vl_col = 480, /* Number of columns */
40 .vl_row = 272, /* Number of rows */
Mark Jackson54e399f2009-08-11 11:33:47 +010041 .vl_clk = 5000000, /* pixel clock in ps */
Mark Jacksonf68378d2009-07-21 11:35:22 +010042 .vl_sync = ATMEL_LCDC_INVCLK_INVERTED |
43 ATMEL_LCDC_INVLINE_INVERTED |
44 ATMEL_LCDC_INVFRAME_INVERTED,
Anatolij Gustschinbcf0b522009-07-26 11:04:59 +020045 .vl_bpix = LCD_COLOR16, /* Bits per pixel, BPP = 2^n */
46 .vl_tft = 1, /* 0 = passive, 1 = TFT */
47 .vl_hsync_len = 42, /* Length of horizontal sync */
48 .vl_left_margin = 1, /* Time from sync to picture */
49 .vl_right_margin = 1, /* Time from picture to sync */
50 .vl_vsync_len = 1, /* Length of vertical sync */
51 .vl_upper_margin = 12, /* Time from sync to picture */
52 .vl_lower_margin = 1, /* Time from picture to sync */
53 .mmio = LCDC_BASE, /* Memory mapped registers */
Mark Jacksonf68378d2009-07-21 11:35:22 +010054};
55
56void lcd_enable(void)
57{
58}
59
60void lcd_disable(void)
61{
62}
63#endif
64
Mark Jackson13b50fe2008-07-30 13:07:27 +010065DECLARE_GLOBAL_DATA_PTR;
66
67static const struct sdram_config sdram_config = {
68 .data_bits = SDRAM_DATA_16BIT,
69 .row_bits = 13,
70 .col_bits = 9,
71 .bank_bits = 2,
72 .cas = 3,
73 .twr = 2,
74 .trc = 6,
75 .trp = 2,
76 .trcd = 2,
77 .tras = 6,
78 .txsr = 6,
79 /* 15.6 us */
80 .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
81};
82
83int board_early_init_f(void)
84{
85 /* Enable SDRAM in the EBI mux */
86 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
87
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020088 /* Enable 26 address bits and NCS2 */
89 portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH);
90 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
Mark Jackson13b50fe2008-07-30 13:07:27 +010091
92 /* de-assert "force sys reset" pin */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020093 portmux_select_gpio(PORTMUX_PORT_D, 1 << 15,
94 PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
Mark Jackson13b50fe2008-07-30 13:07:27 +010095
96 /* init custom i/o */
97 /* cpu type inputs */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020098 portmux_select_gpio(PORTMUX_PORT_E, (1 << 19) | (1 << 20) | (1 << 23),
99 PORTMUX_DIR_INPUT);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100100 /* main board type inputs */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200101 portmux_select_gpio(PORTMUX_PORT_B, (1 << 19) | (1 << 29),
102 PORTMUX_DIR_INPUT);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100103 /* DEBUG input (use weak pullup) */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200104 portmux_select_gpio(PORTMUX_PORT_E, 1 << 21,
105 PORTMUX_DIR_INPUT | PORTMUX_PULL_UP);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100106
107 /* are we suppressing the console ? */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200108 if (gpio_get_value(GPIO_PIN_PE(21)) == 1)
Mark Jacksona69a4232008-10-03 11:48:57 +0100109 gd->flags |= (GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100110
111 /* reset phys */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200112 portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT);
113 portmux_select_gpio(PORTMUX_PORT_C, 1 << 18,
114 PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100115
Mark Jackson13b50fe2008-07-30 13:07:27 +0100116 udelay(5000);
117
118 /* release phys reset */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200119 gpio_set_value(GPIO_PIN_PC(18), 0); /* PHY RESET (Release) */
Mark Jackson13b50fe2008-07-30 13:07:27 +0100120
Mark Jackson58a518c2009-02-13 15:48:18 +0000121 /* setup Data Flash chip select (NCS2) */
122 hsmc3_writel(MODE2, 0x20121003);
123 hsmc3_writel(CYCLE2, 0x000a0009);
124 hsmc3_writel(PULSE2, 0x0a060806);
125 hsmc3_writel(SETUP2, 0x00030102);
126
127 /* setup FRAM chip select (NCS3) */
128 hsmc3_writel(MODE3, 0x10120001);
129 hsmc3_writel(CYCLE3, 0x001e001d);
130 hsmc3_writel(PULSE3, 0x08040704);
131 hsmc3_writel(SETUP3, 0x02050204);
132
Mark Jackson13b50fe2008-07-30 13:07:27 +0100133#if defined(CONFIG_MACB)
134 /* init macb0 pins */
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200135 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
136 portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100137#endif
138
139#if defined(CONFIG_MMC)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200140 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
Mark Jackson13b50fe2008-07-30 13:07:27 +0100141#endif
142
Mark Jacksonf68378d2009-07-21 11:35:22 +0100143#if defined(CONFIG_LCD)
144 portmux_enable_lcdc(1);
145#endif
146
Mark Jackson13b50fe2008-07-30 13:07:27 +0100147 return 0;
148}
149
150phys_size_t initdram(int board_type)
151{
152 unsigned long expected_size;
153 unsigned long actual_size;
154 void *sdram_base;
155
156 sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
157
158 expected_size = sdram_init(sdram_base, &sdram_config);
159 actual_size = get_ram_size(sdram_base, expected_size);
160
161 unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
162
163 if (expected_size != actual_size)
164 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
165 actual_size >> 20, expected_size >> 20);
166
167 return actual_size;
168}
169
Haavard Skinnemoen25e68542008-08-31 18:46:35 +0200170int board_early_init_r(void)
Mark Jackson13b50fe2008-07-30 13:07:27 +0100171{
172 gd->bd->bi_phy_id[0] = 0x01;
173 gd->bd->bi_phy_id[1] = 0x03;
Haavard Skinnemoen25e68542008-08-31 18:46:35 +0200174 return 0;
Mark Jackson13b50fe2008-07-30 13:07:27 +0100175}
176
Mark Jackson80534882008-11-24 12:10:56 +0000177int board_postclk_init(void)
178{
179 /* Use GCLK0 as 10MHz output */
180 gclk_enable_output(0, PORTMUX_DRIVE_LOW);
181 gclk_set_rate(0, GCLK_PARENT_OSC0, 10000000);
182 return 0;
183}
184
Mark Jackson13b50fe2008-07-30 13:07:27 +0100185/* SPI chip select control */
186#ifdef CONFIG_ATMEL_SPI
187#include <spi.h>
188
189int spi_cs_is_valid(unsigned int bus, unsigned int cs)
190{
191 return (bus == 0) && (cs == 0);
192}
193
194void spi_cs_activate(struct spi_slave *slave)
195{
196}
197
198void spi_cs_deactivate(struct spi_slave *slave)
199{
200}
201#endif /* CONFIG_ATMEL_SPI */
202
203#ifdef CONFIG_CMD_NET
Mark Jackson13b50fe2008-07-30 13:07:27 +0100204int board_eth_init(bd_t *bi)
205{
206 macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
207 macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
208
209 return 0;
210}
211#endif