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gerrit.cesnet.cz / github / trini / u-boot / 5411988242cea736c27e9ec758fe5365c0162838 / . / arch / openrisc / lib / board.c
blob: c26cc8f5031e4edad4b365d4a45505ff78d885cc [file] [log] [blame]
Stefan Kristianssone0f1fd42011-11-26 19:04:52 +0000[diff] [blame]1/*
2 * (C) Copyright 2011
3 * Julius Baxter, julius@opencores.org
4 *
5 * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
6 * Scott McNutt <smcnutt@psyent.com>
7 *
8 * (C) Copyright 2000-2002
9 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10 *
11 *
Wolfgang Denk1a459662013-07-08 09:37:19 +0200[diff] [blame]12 * SPDX-License-Identifier: GPL-2.0+
Stefan Kristianssone0f1fd42011-11-26 19:04:52 +0000[diff] [blame]13 */
14
15#include <common.h>
16#include <stdio_dev.h>
17#include <watchdog.h>
18#include <malloc.h>
19#include <mmc.h>
20#include <net.h>
21#ifdef CONFIG_STATUS_LED
22#include <status_led.h>
23#endif
24#ifdef CONFIG_CMD_NAND
25#include <nand.h> /* cannot even include nand.h if it isnt configured */
26#endif
27
28#include <timestamp.h>
29#include <version.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
33/*
34 * All attempts to come up with a "common" initialization sequence
35 * that works for all boards and architectures failed: some of the
36 * requirements are just _too_ different. To get rid of the resulting
37 * mess of board dependend #ifdef'ed code we now make the whole
38 * initialization sequence configurable to the user.
39 *
40 * The requirements for any new initalization function is simple: it
41 * receives a pointer to the "global data" structure as it's only
42 * argument, and returns an integer return code, where 0 means
43 * "continue" and != 0 means "fatal error, hang the system".
44 */
45
46extern int cache_init(void);
47
48/*
49 * Initialization sequence
50 */
51static int (* const init_sequence[])(void) = {
52 cache_init,
53 timer_init, /* initialize timer */
54 env_init,
55 serial_init,
56 console_init_f,
57 display_options,
58 checkcpu,
59 checkboard,
60};
61
62
63/***********************************************************************/
64void board_init(void)
65{
66 bd_t *bd;
67 int i;
68
69 gd = (gd_t *)CONFIG_SYS_GBL_DATA_ADDR;
70
71 memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
72
73 gd->bd = (bd_t *)(gd+1); /* At end of global data */
74 gd->baudrate = CONFIG_BAUDRATE;
75 gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
76
77 bd = gd->bd;
78 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
79 bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
80#ifndef CONFIG_SYS_NO_FLASH
81 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
82#endif
83#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
84 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;
85 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
86#endif
Stefan Kristianssone0f1fd42011-11-26 19:04:52 +0000[diff] [blame]87
88 for (i = 0; i < ARRAY_SIZE(init_sequence); i++) {
89 WATCHDOG_RESET();
90 if (init_sequence[i]())
91 hang();
92 }
93
94 WATCHDOG_RESET();
95
96 /* The Malloc area is immediately below the monitor copy in RAM */
97 mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
98
99#ifndef CONFIG_SYS_NO_FLASH
100 WATCHDOG_RESET();
101 bd->bi_flashsize = flash_init();
102#endif
103
104#ifdef CONFIG_CMD_NAND
105 puts("NAND: ");
106 nand_init();
107#endif
108
109#ifdef CONFIG_GENERIC_MMC
110 puts("MMC: ");
111 mmc_initialize(bd);
112#endif
113
114 WATCHDOG_RESET();
115 env_relocate();
116
117 WATCHDOG_RESET();
118 stdio_init();
119 jumptable_init();
120 console_init_r();
121
122 WATCHDOG_RESET();
123 interrupt_init();
124
125#if defined(CONFIG_BOARD_LATE_INIT)
126 board_late_init();
127#endif
128
129#if defined(CONFIG_CMD_NET)
130 puts("NET: ");
Joe Hershbergerd2eaec62015-03-22 17:09:06 -0500[diff] [blame]131 eth_initialize();
Stefan Kristianssone0f1fd42011-11-26 19:04:52 +0000[diff] [blame]132#endif
133
134 /* main_loop */
135 for (;;) {
136 WATCHDOG_RESET();
137 main_loop();
138 }
139}