blob: 4e4dd74db3d7e1ef9734ae95b28ba607150c8f6d [file] [log] [blame]
Alexey Brodkin2f16ac92014-02-04 12:56:14 +04001/*
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <asm/arcregs.h>
9#include <asm/cache.h>
10
11DECLARE_GLOBAL_DATA_PTR;
12
13int arch_cpu_init(void)
14{
Alexey Brodkin2f16ac92014-02-04 12:56:14 +040015 timer_init();
16
17/* In simulation (ISS) "CHIPID" and "ARCNUM" are all "ff" */
18 if ((read_aux_reg(ARC_AUX_IDENTITY) & 0xffffff00) == 0xffffff00)
19 gd->arch.running_on_hw = 0;
20 else
21 gd->arch.running_on_hw = 1;
22
23 gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
24 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
25
Alexey Brodkinef639e62015-05-18 16:56:26 +030026 cache_init();
27
Alexey Brodkin2f16ac92014-02-04 12:56:14 +040028 return 0;
29}
30
31int arch_early_init_r(void)
32{
33 gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
34 gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
35 return 0;
36}