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gerrit.cesnet.cz / github / trini / u-boot / 540b73a7be6dbe87a2f0c9e86d1d9178bc7f7b76 / . / arch / Kconfig.nxp
blob: 273e8e86dae8c515b5973e7d49beae09e1500f3b [file] [log] [blame]
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]1config NXP_ESBC
2 bool "NXP ESBC (secure boot) functionality"
3 help
4 Enable Freescale Secure Boot feature. Normally selected by defconfig.
5 If unsure, do not change.
6
7menu "Chain of trust / secure boot options"
Udit Agarwal5536c3c2019-11-07 16:11:32 +0000[diff] [blame]8 depends on !FIT_SIGNATURE && NXP_ESBC
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]9
10config CHAIN_OF_TRUST
Tom Rini28522672017-03-01 16:51:58 -0500[diff] [blame]11 select FSL_CAAM
Gaurav Jain66e54712022-06-09 16:32:15 +0530[diff] [blame]12 select ARCH_MISC_INIT
Tom Rinic9f85182022-06-16 14:04:39 -0400[diff] [blame]13 select FSL_SEC_MON
Ley Foon Tan0680f1b2017-05-03 17:13:32 +0800[diff] [blame]14 select SPL_BOARD_INIT if (ARM && SPL)
Alexandru Gagniuc07212092021-09-02 19:54:19 -0500[diff] [blame]15 select SPL_HASH if (ARM && SPL)
Tom Rini089df182017-05-15 12:17:49 -0400[diff] [blame]16 select SHA_HW_ACCEL
17 select SHA_PROG_HW_ACCEL
Simon Glass2be29652017-07-23 21:19:39 -0600[diff] [blame]18 select ENV_IS_NOWHERE
Sumit Garg86c773f2018-01-09 01:27:46 +0530[diff] [blame]19 select CMD_EXT4 if ARM
20 select CMD_EXT4_WRITE if ARM
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]21 imply CMD_BLOB
22 imply CMD_HASH if ARM
23 def_bool y
Simon Glassea7971f2017-05-17 03:25:16 -0600[diff] [blame]24
25config CMD_ESBC_VALIDATE
26 bool "Enable the 'esbc_validate' and 'esbc_halt' commands"
Tom Rini93145332022-06-16 14:04:35 -0400[diff] [blame]27 default y
Simon Glassea7971f2017-05-17 03:25:16 -0600[diff] [blame]28 help
29 This option enables two commands used for secure booting:
30
31 esbc_validate - validate signature using RSA verification
32 esbc_halt - put the core in spin loop (Secure Boot Only)
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]33
Tom Rini2b2817b2022-06-16 14:04:37 -0400[diff] [blame]34config ESBC_HDR_LS
35 bool
36
37config ESBC_ADDR_64BIT
38 def_bool y
39 depends on ESBC_HDR_LS && FSL_LAYERSCAPE
40 help
41 For Layerscape based platforms, ESBC image Address in Header is 64bit.
42
Tom Rini601483f2022-06-16 14:04:40 -0400[diff] [blame]43config SYS_FSL_SFP_BE
44 def_bool y
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]45 depends on PPC || FSL_LSCH2 || ARCH_LS1021A
Tom Rini601483f2022-06-16 14:04:40 -0400[diff] [blame]46
47config SYS_FSL_SFP_LE
48 def_bool y
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]49 depends on !SYS_FSL_SFP_BE
Tom Rini601483f2022-06-16 14:04:40 -0400[diff] [blame]50
51choice
52 prompt "SFP IP revision"
Tom Rini601483f2022-06-16 14:04:40 -0400[diff] [blame]53 default SYS_FSL_SFP_VER_3_0 if PPC
54 default SYS_FSL_SFP_VER_3_4
55
56config SYS_FSL_SFP_VER_3_0
57 bool "SFP version 3.0"
58
59config SYS_FSL_SFP_VER_3_2
60 bool "SFP version 3.2"
61
62config SYS_FSL_SFP_VER_3_4
63 bool "SFP version 3.4"
64
65endchoice
66
67config SYS_FSL_SRK_LE
68 def_bool y
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]69 depends on ARM
Tom Rini601483f2022-06-16 14:04:40 -0400[diff] [blame]70
71config KEY_REVOCATION
72 def_bool y
Tom Rini540b73a2022-06-17 16:24:31 -0400[diff] [blame^]73
74endmenu
75
76comment "Other functionality shared between NXP SoCs"
Tom Rini601483f2022-06-16 14:04:40 -0400[diff] [blame]77
Tom Rini28f9c312022-03-24 17:17:58 -0400[diff] [blame]78config DEEP_SLEEP
79 bool "Enable SoC deep sleep feature"
Tom Rini93145332022-06-16 14:04:35 -0400[diff] [blame]80 depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A
81 default y
Tom Rini28f9c312022-03-24 17:17:58 -0400[diff] [blame]82 help
83 Indicates this SoC supports deep sleep feature. If deep sleep is
84 supported, core will start to execute uboot when wakes up.
85
Stephen Carlson15347d22021-06-22 16:35:20 -0700[diff] [blame]86config FSL_USE_PCA9547_MUX
87 bool "Enable PCA9547 I2C Mux on Freescale boards"
Tom Rini93145332022-06-16 14:04:35 -0400[diff] [blame]88 depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Stephen Carlson15347d22021-06-22 16:35:20 -0700[diff] [blame]89 help
90 This option enables the PCA9547 I2C mux on Freescale boards.
91
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]92config VID
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]93 bool "Enable Freescale VID"
Tom Rini93145332022-06-16 14:04:35 -0400[diff] [blame]94 depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C)
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]95 help
96 This option enables setting core voltage based on individual
97 values saved in SoC fuses.
98
Tom Rinid06e4b72021-12-12 22:12:31 -0500[diff] [blame]99config SPL_VID
100 bool "Enable Freescale VID in SPL"
Tom Rini93145332022-06-16 14:04:35 -0400[diff] [blame]101 depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C)
Tom Rinid06e4b72021-12-12 22:12:31 -0500[diff] [blame]102 help
103 This option enables setting core voltage based on individual
104 values saved in SoC fuses, in SPL.
105
106if VID || SPL_VID
107
108config VID_FLS_ENV
109 string "Environment variable for overriding VDD"
110 help
111 This option allows for specifying the environment variable
112 to check to override VDD information.
113
114config VOL_MONITOR_INA220
115 bool "Enable the INA220 voltage monitor read"
116 help
117 This option enables INA220 voltage monitor read
118 functionality. It is used by the common VID driver.
119
120config VOL_MONITOR_IR36021_READ
121 bool "Enable the IR36021 voltage monitor read"
122 help
123 This option enables IR36021 voltage monitor read
124 functionality. It is used by the common VID driver.
125
126config VOL_MONITOR_IR36021_SET
127 bool "Enable the IR36021 voltage monitor set"
128 help
129 This option enables IR36021 voltage monitor set
130 functionality. It is used by the common VID driver.
131
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]132config VOL_MONITOR_LTC3882_READ
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]133 bool "Enable the LTC3882 voltage monitor read"
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]134 help
135 This option enables LTC3882 voltage monitor read
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]136 functionality. It is used by the common VID driver.
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]137
138config VOL_MONITOR_LTC3882_SET
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]139 bool "Enable the LTC3882 voltage monitor set"
Rajesh Bhagat6f2d0a52018-01-17 16:13:04 +0530[diff] [blame]140 help
141 This option enables LTC3882 voltage monitor set
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]142 functionality. It is used by the common VID driver.
143
144config VOL_MONITOR_ISL68233_READ
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]145 bool "Enable the ISL68233 voltage monitor read"
146 help
147 This option enables ISL68233 voltage monitor read
148 functionality. It is used by the common VID driver.
149
150config VOL_MONITOR_ISL68233_SET
Stephen Carlsonb5ee48c2021-02-08 11:11:29 +0100[diff] [blame]151 bool "Enable the ISL68233 voltage monitor set"
152 help
153 This option enables ISL68233 voltage monitor set
154 functionality. It is used by the common VID driver.
Tom Rinid06e4b72021-12-12 22:12:31 -0500[diff] [blame]155
156endif
Tom Rinid43cd482022-03-30 18:07:32 -0400[diff] [blame]157
158config FSL_QIXIS
159 bool "Enable QIXIS support"
Tom Rini93145332022-06-16 14:04:35 -0400[diff] [blame]160 depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Tom Rinid43cd482022-03-30 18:07:32 -0400[diff] [blame]161
162config QIXIS_I2C_ACCESS
163 bool "Access to QIXIS is over i2c"
164 depends on FSL_QIXIS
165 default y
Tom Rini5cc1d922022-06-08 08:24:28 -0400[diff] [blame]166
167config HAS_FSL_DR_USB
168 def_bool y
169 depends on USB_EHCI_HCD && PPC