blob: 3de9c7068ea5629ebfc589815b7fe9234e05b7b6 [file] [log] [blame]
Heiko Stuebner537b1a22019-07-16 22:12:07 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6/ {
7 aliases {
8 mmc0 = &emmc;
9 mmc1 = &sdmmc;
10 };
11
12 chosen {
13 u-boot,spl-boot-order = &emmc, &sdmmc;
14 };
15};
16
17&dmc {
18 u-boot,dm-pre-reloc;
19};
20
21&uart2 {
22 clock-frequency = <24000000>;
23 u-boot,dm-pre-reloc;
24};
25
26&uart5 {
27 clock-frequency = <24000000>;
28 u-boot,dm-pre-reloc;
29};
30
31&sdmmc {
32 u-boot,dm-pre-reloc;
33
34 /* temporary till I find out why dma mode doesn't work */
35 fifo-mode;
36};
37
38&emmc {
39 u-boot,dm-pre-reloc;
40};
41
42&grf {
43 u-boot,dm-pre-reloc;
44};
45
46&pmugrf {
47 u-boot,dm-pre-reloc;
48};
49
50&xin24m {
51 u-boot,dm-pre-reloc;
52};
53
54&cru {
55 u-boot,dm-pre-reloc;
56};
57
58&pmucru {
59 u-boot,dm-pre-reloc;
60};
61
62&saradc {
63 u-boot,dm-pre-reloc;
64 status = "okay";
65};
66
67&gpio0 {
68 u-boot,dm-pre-reloc;
69};
70
71&gpio1 {
72 u-boot,dm-pre-reloc;
73};
74
75&gpio2 {
76 u-boot,dm-pre-reloc;
77};
78
79&gpio3 {
80 u-boot,dm-pre-reloc;
81};