wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 1 | /* |
Wolfgang Denk | 91a7675 | 2010-07-24 20:22:02 +0200 | [diff] [blame] | 2 | * (C) Copyright 2002-2010 |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __ASM_GBL_DATA_H |
| 9 | #define __ASM_GBL_DATA_H |
Simon Glass | 5cb4858 | 2012-12-13 20:48:30 +0000 | [diff] [blame] | 10 | |
| 11 | /* Architecture-specific global data */ |
| 12 | struct arch_global_data { |
Simon Glass | e9adeca | 2012-12-13 20:49:05 +0000 | [diff] [blame] | 13 | #if defined(CONFIG_FSL_ESDHC) |
| 14 | u32 sdhc_clk; |
| 15 | #endif |
Zhao Qiang | 93d3320 | 2014-09-25 13:52:25 +0800 | [diff] [blame] | 16 | |
| 17 | #if defined(CONFIG_U_QE) |
| 18 | u32 qe_clk; |
| 19 | u32 brg_clk; |
| 20 | uint mp_alloc_base; |
| 21 | uint mp_alloc_top; |
| 22 | #endif /* CONFIG_U_QE */ |
| 23 | |
Simon Glass | f47e6ec | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 24 | #ifdef CONFIG_AT91FAMILY |
| 25 | /* "static data" needed by at91's clock.c */ |
| 26 | unsigned long cpu_clk_rate_hz; |
| 27 | unsigned long main_clk_rate_hz; |
| 28 | unsigned long mck_rate_hz; |
| 29 | unsigned long plla_rate_hz; |
| 30 | unsigned long pllb_rate_hz; |
| 31 | unsigned long at91_pllb_usb_init; |
| 32 | #endif |
Simon Glass | b339051 | 2012-12-13 20:48:32 +0000 | [diff] [blame] | 33 | /* "static data" needed by most of timer.c on ARM platforms */ |
| 34 | unsigned long timer_rate_hz; |
Simon Glass | 8ff43b0 | 2012-12-13 20:48:33 +0000 | [diff] [blame] | 35 | unsigned long tbu; |
Simon Glass | 66ee692 | 2012-12-13 20:48:34 +0000 | [diff] [blame] | 36 | unsigned long tbl; |
Simon Glass | 582601d | 2012-12-13 20:48:35 +0000 | [diff] [blame] | 37 | unsigned long lastinc; |
Simon Glass | 5f70714 | 2012-12-13 20:48:36 +0000 | [diff] [blame] | 38 | unsigned long long timer_reset_value; |
Simon Glass | 34fd5d2 | 2012-12-13 20:48:39 +0000 | [diff] [blame] | 39 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
| 40 | unsigned long tlb_addr; |
| 41 | unsigned long tlb_size; |
Alexander Graf | 7985cdf | 2016-03-04 01:09:54 +0100 | [diff] [blame] | 42 | #if defined(CONFIG_ARM64) |
Alexander Graf | 5e2ec77 | 2016-03-04 01:09:47 +0100 | [diff] [blame] | 43 | unsigned long tlb_fillptr; |
| 44 | unsigned long tlb_emerg; |
| 45 | #endif |
Simon Glass | 34fd5d2 | 2012-12-13 20:48:39 +0000 | [diff] [blame] | 46 | #endif |
York Sun | e61a753 | 2016-06-24 16:46:18 -0700 | [diff] [blame^] | 47 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
| 48 | #define MEM_RESERVE_SECURE_SECURED 0x1 |
| 49 | #define MEM_RESERVE_SECURE_MAINTAINED 0x2 |
| 50 | #define MEM_RESERVE_SECURE_ADDR_MASK (~0x3) |
| 51 | /* |
| 52 | * Secure memory addr |
| 53 | * This variable needs maintenance if the RAM base is not zero, |
| 54 | * or if RAM splits into non-consecutive banks. It also has a |
| 55 | * flag indicating the secure memory is marked as secure by MMU. |
| 56 | * Flags used: 0x1 secured |
| 57 | * 0x2 maintained |
| 58 | */ |
| 59 | phys_addr_t secure_ram; |
| 60 | #endif |
SRICHARAN R | fda0681 | 2013-04-24 00:41:23 +0000 | [diff] [blame] | 61 | |
Paul Kocialkowski | 60c7c30 | 2015-07-15 16:02:19 +0200 | [diff] [blame] | 62 | #ifdef CONFIG_OMAP_COMMON |
| 63 | u32 omap_boot_device; |
| 64 | u32 omap_boot_mode; |
| 65 | u8 omap_ch_flags; |
SRICHARAN R | fda0681 | 2013-04-24 00:41:23 +0000 | [diff] [blame] | 66 | #endif |
Prabhakar Kushwaha | 4493721 | 2015-11-09 16:42:07 +0530 | [diff] [blame] | 67 | #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR) |
York Sun | b87e6f8 | 2015-01-06 13:18:49 -0800 | [diff] [blame] | 68 | unsigned long mem2_clk; |
| 69 | #endif |
Simon Glass | 5cb4858 | 2012-12-13 20:48:30 +0000 | [diff] [blame] | 70 | }; |
| 71 | |
Simon Glass | baa1e53 | 2012-12-13 20:49:14 +0000 | [diff] [blame] | 72 | #include <asm-generic/global_data.h> |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 73 | |
Jeroen Hofstee | c65a2ab | 2014-07-30 21:54:52 +0200 | [diff] [blame] | 74 | #ifdef __clang__ |
| 75 | |
| 76 | #define DECLARE_GLOBAL_DATA_PTR |
| 77 | #define gd get_gd() |
| 78 | |
| 79 | static inline gd_t *get_gd(void) |
| 80 | { |
| 81 | gd_t *gd_ptr; |
| 82 | |
| 83 | #ifdef CONFIG_ARM64 |
| 84 | /* |
| 85 | * Make will already error that reserving x18 is not supported at the |
| 86 | * time of writing, clang: error: unknown argument: '-ffixed-x18' |
| 87 | */ |
| 88 | __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr)); |
| 89 | #else |
| 90 | __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr)); |
| 91 | #endif |
| 92 | |
| 93 | return gd_ptr; |
| 94 | } |
| 95 | |
| 96 | #else |
| 97 | |
David Feng | 0ae7653 | 2013-12-14 11:47:35 +0800 | [diff] [blame] | 98 | #ifdef CONFIG_ARM64 |
| 99 | #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18") |
| 100 | #else |
| 101 | #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9") |
| 102 | #endif |
Jeroen Hofstee | c65a2ab | 2014-07-30 21:54:52 +0200 | [diff] [blame] | 103 | #endif |
wdenk | 0157ced | 2002-10-21 17:04:47 +0000 | [diff] [blame] | 104 | |
| 105 | #endif /* __ASM_GBL_DATA_H */ |