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wdenk153d5112002-08-30 11:07:04 +00001/*
stroese8b1ccd82004-09-16 12:34:51 +00002 * (C) Copyright 2001-2004
wdenk153d5112002-08-30 11:07:04 +00003 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "ar405.h"
26#include <asm/processor.h>
Matthias Fuchs049216f2009-02-20 10:19:18 +010027#include <asm/io.h>
wdenk153d5112002-08-30 11:07:04 +000028#include <command.h>
wdenk153d5112002-08-30 11:07:04 +000029
Wolfgang Denkd87080b2006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
31
wdenk8bde7f72003-06-27 21:31:46 +000032/*cmd_boot.c*/
Wolfgang Denk54841ab2010-06-28 22:00:46 +020033extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
stroese8b1ccd82004-09-16 12:34:51 +000034extern void lxt971_no_sleep(void);
wdenk153d5112002-08-30 11:07:04 +000035
36/* ------------------------------------------------------------------------- */
37
38#if 0
39#define FPGA_DEBUG
40#endif
41
42/* fpga configuration data - generated by bin2cc */
43const unsigned char fpgadata[] = {
44#include "fpgadata.c"
45};
46
stroese8b1ccd82004-09-16 12:34:51 +000047const unsigned char fpgadata_xl30[] = {
48#include "fpgadata_xl30.c"
49};
50
wdenk153d5112002-08-30 11:07:04 +000051/*
52 * include common fpga code (for esd boards)
53 */
54#include "../common/fpga.c"
55
56
wdenkc837dcb2004-01-20 23:12:12 +000057int board_early_init_f (void)
wdenk153d5112002-08-30 11:07:04 +000058{
wdenk153d5112002-08-30 11:07:04 +000059 int index, len, i;
60 int status;
61
62#ifdef FPGA_DEBUG
63 /* set up serial port with default baudrate */
64 (void) get_clocks ();
65 gd->baudrate = CONFIG_BAUDRATE;
66 serial_init ();
67 console_init_f ();
68#endif
69
70 /*
71 * Boot onboard FPGA
72 */
stroese8b1ccd82004-09-16 12:34:51 +000073 /* first try 40er image */
74 gd->board_type = 40;
wdenk153d5112002-08-30 11:07:04 +000075 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
76 if (status != 0) {
stroese8b1ccd82004-09-16 12:34:51 +000077 /* try xl30er image */
78 gd->board_type = 30;
79 status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
80 if (status != 0) {
81 /* booting FPGA failed */
wdenk153d5112002-08-30 11:07:04 +000082#ifndef FPGA_DEBUG
stroese8b1ccd82004-09-16 12:34:51 +000083 /* set up serial port with default baudrate */
84 (void) get_clocks ();
85 gd->baudrate = CONFIG_BAUDRATE;
86 serial_init ();
87 console_init_f ();
wdenk153d5112002-08-30 11:07:04 +000088#endif
stroese8b1ccd82004-09-16 12:34:51 +000089 printf ("\nFPGA: Booting failed ");
90 switch (status) {
91 case ERROR_FPGA_PRG_INIT_LOW:
92 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
93 break;
94 case ERROR_FPGA_PRG_INIT_HIGH:
95 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
96 break;
97 case ERROR_FPGA_PRG_DONE:
98 printf ("(Timeout: DONE not high after programming FPGA)\n ");
99 break;
100 }
wdenk153d5112002-08-30 11:07:04 +0000101
stroese8b1ccd82004-09-16 12:34:51 +0000102 /* display infos on fpgaimage */
103 index = 15;
104 for (i = 0; i < 4; i++) {
105 len = fpgadata[index];
106 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
107 index += len + 3;
108 }
109 putc ('\n');
110 /* delayed reboot */
111 for (i = 20; i > 0; i--) {
112 printf ("Rebooting in %2d seconds \r", i);
113 for (index = 0; index < 1000; index++)
114 udelay (1000);
115 }
116 putc ('\n');
117 do_reset (NULL, 0, 0, NULL);
wdenk153d5112002-08-30 11:07:04 +0000118 }
wdenk153d5112002-08-30 11:07:04 +0000119 }
120
121 /*
122 * IRQ 0-15 405GP internally generated; active high; level sensitive
123 * IRQ 16 405GP internally generated; active low; level sensitive
124 * IRQ 17-24 RESERVED
125 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
126 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
127 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
128 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
129 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
130 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
131 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
132 */
Stefan Roese952e7762009-09-24 09:55:50 +0200133 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
134 mtdcr (UIC0ER, 0x00000000); /* disable all ints */
135 mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
136 mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
137 mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
138 mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
139 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
wdenk153d5112002-08-30 11:07:04 +0000140
Matthias Fuchs049216f2009-02-20 10:19:18 +0100141 out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */
wdenk153d5112002-08-30 11:07:04 +0000142
143 return 0;
144}
145
wdenk153d5112002-08-30 11:07:04 +0000146/*
147 * Check Board Identity:
148 */
wdenk153d5112002-08-30 11:07:04 +0000149int checkboard (void)
150{
151 int index;
152 int len;
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200153 char str[64];
Wolfgang Denkcdb74972010-07-24 21:55:43 +0200154 int i = getenv_f("serial#", str, sizeof (str));
stroese8b1ccd82004-09-16 12:34:51 +0000155 const unsigned char *fpga;
wdenk153d5112002-08-30 11:07:04 +0000156
157 puts ("Board: ");
158
stroese8b1ccd82004-09-16 12:34:51 +0000159 if (i == -1) {
160 puts ("### No HW ID - assuming AR405");
161 } else {
162 puts(str);
wdenk153d5112002-08-30 11:07:04 +0000163 }
164
wdenk153d5112002-08-30 11:07:04 +0000165 puts ("\nFPGA: ");
166
167 /* display infos on fpgaimage */
stroese8b1ccd82004-09-16 12:34:51 +0000168 if (gd->board_type == 30) {
169 fpga = fpgadata_xl30;
170 } else {
171 fpga = fpgadata;
172 }
wdenk153d5112002-08-30 11:07:04 +0000173 index = 15;
174 for (i = 0; i < 4; i++) {
stroese8b1ccd82004-09-16 12:34:51 +0000175 len = fpga[index];
176 printf ("%s ", &(fpga[index + 1]));
wdenk153d5112002-08-30 11:07:04 +0000177 index += len + 3;
178 }
179
180 putc ('\n');
181
stroese8b1ccd82004-09-16 12:34:51 +0000182 /*
183 * Disable sleep mode in LXT971
184 */
185 lxt971_no_sleep();
186
wdenk153d5112002-08-30 11:07:04 +0000187 return 0;
188}
189
stroese8d3efe42004-12-16 18:30:36 +0000190
191#if 1 /* test-only: some internal test routines... */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100192#define DIGEN ((void *)0xf03000b4) /* u8 */
193#define DIGOUT ((void *)0xf03000b0) /* u16 */
194#define DIGIN ((void *)0xf03000a0) /* u16 */
195
stroese8d3efe42004-12-16 18:30:36 +0000196/*
197 * Some test routines
198 */
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200199int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000200{
stroese8d3efe42004-12-16 18:30:36 +0000201 int i;
202 int k;
203 int start;
204 int end;
205
206 if (argc != 3) {
207 puts("Usage: digtest n_start n_end (digtest 0 7)\n");
208 return 0;
209 }
210
211 start = simple_strtol (argv[1], NULL, 10);
212 end = simple_strtol (argv[2], NULL, 10);
213
214 /*
215 * Enable digital outputs
216 */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100217 out_8(DIGEN, 0x08);
stroese8d3efe42004-12-16 18:30:36 +0000218
219 printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
220 start, end);
221
222 /*
223 * Set outputs one by one
224 */
225 for (;;) {
226 for (i=start; i<=end; i++) {
Matthias Fuchs049216f2009-02-20 10:19:18 +0100227 out_be16(DIGOUT, 0x0001 << i);
stroese8d3efe42004-12-16 18:30:36 +0000228 for (k=0; k<200; k++)
229 udelay(1000);
230
Matthias Fuchs049216f2009-02-20 10:19:18 +0100231 if (in_be16(DIGIN) != (0x0001 << i)) {
232 printf("ERROR: OUT=0x%04X, IN=0x%04X\n",
233 0x0001 << i, in_be16(DIGIN));
stroese8d3efe42004-12-16 18:30:36 +0000234 return 0;
235 }
236
237 /* Abort if ctrl-c was pressed */
238 if (ctrlc()) {
239 puts("\nAbort\n");
240 return 0;
241 }
242 }
243 }
244
245 return 0;
246}
247U_BOOT_CMD(
248 digtest, 3, 1, do_digtest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600249 "Test digital in-/output",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200250 ""
251);
stroese8d3efe42004-12-16 18:30:36 +0000252
253#define ERROR_DELTA 256
254
255struct io {
Matthias Fuchs049216f2009-02-20 10:19:18 +0100256 short val;
stroese8d3efe42004-12-16 18:30:36 +0000257 short dummy;
258};
259
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200260int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000261{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100262 short val;
stroese8d3efe42004-12-16 18:30:36 +0000263 int i;
264 int volt;
265 struct io *out;
266 struct io *in;
267
268 out = (struct io *)0xf0300090;
269 in = (struct io *)0xf0300000;
270
271 i = simple_strtol (argv[1], NULL, 10);
272
273 volt = 0;
274 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100275 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000276 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100277 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000278 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
279 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
280 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
281 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
282 ((volt * 0x7fff) / 40) + ERROR_DELTA);
283 return -1;
284 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100285 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000286 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
287 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
288 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
289 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
290 ((volt * 0x7fff) / 40) + ERROR_DELTA);
291 return -1;
292 }
293
294 volt = 5;
295 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100296 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000297 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100298 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000299 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
300 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
301 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
302 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
303 ((volt * 0x7fff) / 40) + ERROR_DELTA);
304 return -1;
305 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100306 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000307 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
308 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
309 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
310 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
311 ((volt * 0x7fff) / 40) + ERROR_DELTA);
312 return -1;
313 }
314
315 volt = 10;
316 printf("Setting Channel %d to %dV...\n", i, volt);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100317 out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
stroese8d3efe42004-12-16 18:30:36 +0000318 udelay(10000);
Matthias Fuchs049216f2009-02-20 10:19:18 +0100319 val = in_be16((void *)&(in[i*2].val));
stroese8d3efe42004-12-16 18:30:36 +0000320 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
321 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
322 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
323 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
324 ((volt * 0x7fff) / 40) + ERROR_DELTA);
325 return -1;
326 }
Matthias Fuchs049216f2009-02-20 10:19:18 +0100327 val = in_be16((void *)&(in[i*2+1].val));
stroese8d3efe42004-12-16 18:30:36 +0000328 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
329 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
330 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
331 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
332 ((volt * 0x7fff) / 40) + ERROR_DELTA);
333 return -1;
334 }
335
336 printf("Channel %d OK!\n", i);
337
338 return 0;
339}
340U_BOOT_CMD(
341 anatest, 2, 1, do_anatest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600342 "Test analog in-/output",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200343 ""
344);
stroese8d3efe42004-12-16 18:30:36 +0000345
346
347int counter = 0;
348
349void cyclicInt(void *ptr)
350{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100351 out_be16((void *)0xf03000e8, 0x0800); /* ack int */
stroese8d3efe42004-12-16 18:30:36 +0000352 counter++;
353}
354
355
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200356int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
stroese8d3efe42004-12-16 18:30:36 +0000357{
Matthias Fuchs049216f2009-02-20 10:19:18 +0100358 ulong *incin;
stroese8d3efe42004-12-16 18:30:36 +0000359 int i;
360
Matthias Fuchs049216f2009-02-20 10:19:18 +0100361 incin = (ulong *)0xf0300040;
stroese8d3efe42004-12-16 18:30:36 +0000362
363 /*
364 * Clear inc counter
365 */
Matthias Fuchs049216f2009-02-20 10:19:18 +0100366 out_be32((void *)&incin[0], 0);
367 out_be32((void *)&incin[1], 0);
368 out_be32((void *)&incin[2], 0);
369 out_be32((void *)&incin[3], 0);
stroese8d3efe42004-12-16 18:30:36 +0000370
Matthias Fuchs049216f2009-02-20 10:19:18 +0100371 incin = (ulong *)0xf0300050;
stroese8d3efe42004-12-16 18:30:36 +0000372
373 /*
374 * Inc a little
375 */
376 for (i=0; i<10000; i++) {
377 switch (i & 0x03) {
378 case 0:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100379 out_8(DIGEN, 0x02);
stroese8d3efe42004-12-16 18:30:36 +0000380 break;
381 case 1:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100382 out_8(DIGEN, 0x03);
stroese8d3efe42004-12-16 18:30:36 +0000383 break;
384 case 2:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100385 out_8(DIGEN, 0x01);
stroese8d3efe42004-12-16 18:30:36 +0000386 break;
387 case 3:
Matthias Fuchs049216f2009-02-20 10:19:18 +0100388 out_8(DIGEN, 0x00);
stroese8d3efe42004-12-16 18:30:36 +0000389 break;
390 }
391 udelay(10);
392 }
393
Matthias Fuchs049216f2009-02-20 10:19:18 +0100394 printf("Inc 0 = %d\n", in_be32((void *)&incin[0]));
395 printf("Inc 1 = %d\n", in_be32((void *)&incin[1]));
396 printf("Inc 2 = %d\n", in_be32((void *)&incin[2]));
397 printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));
stroese8d3efe42004-12-16 18:30:36 +0000398
Matthias Fuchs049216f2009-02-20 10:19:18 +0100399 out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */
400 out_be16((void *)0xf03000ec,
401 in_be16((void *)0xf03000ec) | 0x0800); /* enable int */
stroese8d3efe42004-12-16 18:30:36 +0000402 irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
403 printf("counter=%d\n", counter);
404
405 return 0;
406}
407U_BOOT_CMD(
408 inctest, 3, 1, do_inctest,
Peter Tyser2fb26042009-01-27 18:03:12 -0600409 "Test incremental encoder inputs",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200410 ""
411);
stroese8d3efe42004-12-16 18:30:36 +0000412#endif