| Masahiro Yamada | 0b11dbf | 2015-07-26 02:46:26 +0900 | [diff] [blame] | 1 | # |
| 2 | # Multifunction miscellaneous devices |
| 3 | # |
| 4 | |
| 5 | menu "Multifunction device drivers" |
| 6 | |
| Thomas Chou | 4395e06 | 2015-10-07 20:20:51 +0800 | [diff] [blame] | 7 | config MISC |
| 8 | bool "Enable Driver Model for Misc drivers" |
| 9 | depends on DM |
| 10 | help |
| 11 | Enable driver model for miscellaneous devices. This class is |
| 12 | used only for those do not fit other more general classes. A |
| 13 | set of generic read, write and ioctl methods may be used to |
| 14 | access the device. |
| 15 | |
| Thomas Chou | ca844dd | 2015-10-14 08:43:31 +0800 | [diff] [blame] | 16 | config ALTERA_SYSID |
| 17 | bool "Altera Sysid support" |
| 18 | depends on MISC |
| 19 | help |
| 20 | Select this to enable a sysid for Altera devices. Please find |
| 21 | details on the "Embedded Peripherals IP User Guide" of Altera. |
| 22 | |
| Simon Glass | 6fb9ac1 | 2015-02-13 12:20:47 -0700 | [diff] [blame] | 23 | config CMD_CROS_EC |
| 24 | bool "Enable crosec command" |
| 25 | depends on CROS_EC |
| 26 | help |
| 27 | Enable command-line access to the Chrome OS EC (Embedded |
| 28 | Controller). This provides the 'crosec' command which has |
| 29 | a number of sub-commands for performing EC tasks such as |
| 30 | updating its flash, accessing a small saved context area |
| 31 | and talking to the I2C bus behind the EC (if there is one). |
| 32 | |
| 33 | config CROS_EC |
| 34 | bool "Enable Chrome OS EC" |
| 35 | help |
| 36 | Enable access to the Chrome OS EC. This is a separate |
| 37 | microcontroller typically available on a SPI bus on Chromebooks. It |
| 38 | provides access to the keyboard, some internal storage and may |
| 39 | control access to the battery and main PMIC depending on the |
| 40 | device. You can use the 'crosec' command to access it. |
| 41 | |
| 42 | config CROS_EC_I2C |
| 43 | bool "Enable Chrome OS EC I2C driver" |
| 44 | depends on CROS_EC |
| 45 | help |
| 46 | Enable I2C access to the Chrome OS EC. This is used on older |
| 47 | ARM Chromebooks such as snow and spring before the standard bus |
| 48 | changed to SPI. The EC will accept commands across the I2C using |
| 49 | a special message protocol, and provide responses. |
| 50 | |
| 51 | config CROS_EC_LPC |
| 52 | bool "Enable Chrome OS EC LPC driver" |
| 53 | depends on CROS_EC |
| 54 | help |
| 55 | Enable I2C access to the Chrome OS EC. This is used on x86 |
| 56 | Chromebooks such as link and falco. The keyboard is provided |
| 57 | through a legacy port interface, so on x86 machines the main |
| 58 | function of the EC is power and thermal management. |
| 59 | |
| Simon Glass | 47cb8c6 | 2015-03-26 09:29:40 -0600 | [diff] [blame] | 60 | config CROS_EC_SANDBOX |
| 61 | bool "Enable Chrome OS EC sandbox driver" |
| 62 | depends on CROS_EC && SANDBOX |
| 63 | help |
| 64 | Enable a sandbox emulation of the Chrome OS EC. This supports |
| 65 | keyboard (use the -l flag to enable the LCD), verified boot context, |
| 66 | EC flash read/write/erase support and a few other things. It is |
| 67 | enough to perform a Chrome OS verified boot on sandbox. |
| 68 | |
| Simon Glass | 6fb9ac1 | 2015-02-13 12:20:47 -0700 | [diff] [blame] | 69 | config CROS_EC_SPI |
| 70 | bool "Enable Chrome OS EC SPI driver" |
| 71 | depends on CROS_EC |
| 72 | help |
| 73 | Enable SPI access to the Chrome OS EC. This is used on newer |
| 74 | ARM Chromebooks such as pit, pi and nyan-big. The SPI interface |
| 75 | provides a faster and more robust interface than I2C but the bugs |
| 76 | are less interesting. |
| 77 | |
| Peng Fan | c12e0d9 | 2015-08-26 15:41:33 +0800 | [diff] [blame] | 78 | config FSL_SEC_MON |
| gaurav rana | fe78378 | 2015-02-27 09:44:22 +0530 | [diff] [blame] | 79 | bool "Enable FSL SEC_MON Driver" |
| 80 | help |
| 81 | Freescale Security Monitor block is responsible for monitoring |
| 82 | system states. |
| 83 | Security Monitor can be transitioned on any security failures, |
| 84 | like software violations or hardware security violations. |
| Stefan Roese | 1cdd941 | 2015-03-12 11:22:46 +0100 | [diff] [blame] | 85 | |
| Peng Fan | 3e020f0 | 2015-08-27 14:49:05 +0800 | [diff] [blame] | 86 | config MXC_OCOTP |
| 87 | bool "Enable MXC OCOTP Driver" |
| 88 | help |
| 89 | If you say Y here, you will get support for the One Time |
| 90 | Programmable memory pages that are stored on the some |
| 91 | Freescale i.MX processors. |
| 92 | |
| Stefan Roese | 1cdd941 | 2015-03-12 11:22:46 +0100 | [diff] [blame] | 93 | config PCA9551_LED |
| 94 | bool "Enable PCA9551 LED driver" |
| 95 | help |
| 96 | Enable driver for PCA9551 LED controller. This controller |
| 97 | is connected via I2C. So I2C needs to be enabled. |
| 98 | |
| 99 | config PCA9551_I2C_ADDR |
| 100 | hex "I2C address of PCA9551 LED controller" |
| 101 | depends on PCA9551_LED |
| 102 | default 0x60 |
| 103 | help |
| 104 | The I2C address of the PCA9551 LED controller. |
| Simon Glass | f991745 | 2015-06-23 15:39:13 -0600 | [diff] [blame] | 105 | |
| 106 | config RESET |
| 107 | bool "Enable support for reset drivers" |
| 108 | depends on DM |
| 109 | help |
| 110 | Enable reset drivers which can be used to reset the CPU or board. |
| 111 | Each driver can provide a reset method which will be called to |
| 112 | effect a reset. The uclass will try all available drivers when |
| 113 | reset_walk() is called. |
| Masahiro Yamada | 0b11dbf | 2015-07-26 02:46:26 +0900 | [diff] [blame] | 114 | |
| 115 | endmenu |