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Heiko Schocher67fa8c22010-02-22 16:43:02 +05301/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
Holger Brunck8170aef2012-07-05 05:37:46 +00009 * (C) Copyright 2011-2012
10 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Holger Brunck83b40c32011-06-16 18:11:15 +053012 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020013 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocher67fa8c22010-02-22 16:43:02 +053014 */
15
16/*
17 * for linking errors see
18 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
19 */
20
Holger Brunck83b40c32011-06-16 18:11:15 +053021#ifndef _CONFIG_KM_KIRKWOOD_H
22#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher67fa8c22010-02-22 16:43:02 +053023
Holger Brunck48ced622012-07-05 05:05:06 +000024/* KM_KIRKWOOD */
Holger Brunck8170aef2012-07-05 05:37:46 +000025#if defined(CONFIG_KM_KIRKWOOD)
26#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"
Holger Brunckd9354532012-07-05 05:05:02 +000027#define CONFIG_HOSTNAME km_kirkwood
Holger Brunck48ced622012-07-05 05:05:06 +000028#define CONFIG_KM_DISABLE_PCIE
Heiko Schocherf3e93612012-10-25 11:07:00 +020029#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck48ced622012-07-05 05:05:06 +000030
31/* KM_KIRKWOOD_PCI */
Holger Brunck8170aef2012-07-05 05:37:46 +000032#elif defined(CONFIG_KM_KIRKWOOD_PCI)
33#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"
Holger Brunckd9354532012-07-05 05:05:02 +000034#define CONFIG_HOSTNAME km_kirkwood_pci
Heiko Schocherf3e93612012-10-25 11:07:00 +020035#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck48ced622012-07-05 05:05:06 +000036#define CONFIG_KM_FPGA_CONFIG
37
Karlheinz Jerg5e4eeab2013-09-18 09:32:48 +020038/* KM_KIRKWOOD_128M16 */
39#elif defined(CONFIG_KM_KIRKWOOD_128M16)
40#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16"
41#define CONFIG_HOSTNAME km_kirkwood_128m16
42#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090043#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Karlheinz Jerg5e4eeab2013-09-18 09:32:48 +020044#define CONFIG_KM_DISABLE_PCIE
Holger Bruncke28d4a22013-10-07 15:10:03 +020045#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Karlheinz Jerg5e4eeab2013-09-18 09:32:48 +020046
Gerlando Falauto9c134e12014-02-13 16:43:00 +010047/* KM_NUSA / KM_SUGP1 */
48#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
Heiko Schocherf3e93612012-10-25 11:07:00 +020049#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Gerlando Falauto9c134e12014-02-13 16:43:00 +010050
51# if defined(CONFIG_KM_NUSA)
Holger Brunck8170aef2012-07-05 05:37:46 +000052#define CONFIG_IDENT_STRING "\nKeymile NUSA"
Holger Brunckd9354532012-07-05 05:05:02 +000053#define CONFIG_HOSTNAME kmnusa
Gerlando Falauto9c134e12014-02-13 16:43:00 +010054# elif defined(CONFIG_KM_SUGP1)
55#define CONFIG_IDENT_STRING "\nKeymile SUGP1"
56#define CONFIG_HOSTNAME kmsugp1
57#define KM_PCIE_RESET_MPP7
58#endif
59
Holger Brunck8170aef2012-07-05 05:37:46 +000060#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090061#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck8170aef2012-07-05 05:37:46 +000062#define CONFIG_KM_ENV_IS_IN_SPI_NOR
63#define CONFIG_KM_FPGA_CONFIG
64#define CONFIG_KM_PIGGY4_88E6352
Valentin Longchampbe3e8be2012-08-16 01:25:20 +000065#define CONFIG_MV88E6352_SWITCH
66#define CONFIG_KM_MVEXTSW_ADDR 0x10
Holger Brunck8170aef2012-07-05 05:37:46 +000067
Holger Brunckf9454392012-07-05 05:05:03 +000068/* KM_MGCOGE3UN */
69#elif defined(CONFIG_KM_MGCOGE3UN)
70#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
71#define CONFIG_HOSTNAME mgcoge3un
Heiko Schocherf3e93612012-10-25 11:07:00 +020072#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckf9454392012-07-05 05:05:03 +000073#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090074#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
Holger Brunckf9454392012-07-05 05:05:03 +000075#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
76#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
77#define CONFIG_KM_DISABLE_PCIE
78#define CONFIG_KM_PIGGY4_88E6061
79
80/* KMCOGE5UN */
Holger Brunckd9354532012-07-05 05:05:02 +000081#elif defined(CONFIG_KM_COGE5UN)
82#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
Heiko Schocherf3e93612012-10-25 11:07:00 +020083#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckd9354532012-07-05 05:05:02 +000084#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090085#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
Holger Brunckd9354532012-07-05 05:05:02 +000086#define CONFIG_KM_ENV_IS_IN_SPI_NOR
87#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
88#define CONFIG_HOSTNAME kmcoge5un
89#define CONFIG_KM_DISABLE_PCIE
90#define CONFIG_KM_PIGGY4_88E6352
Holger Brunck6ef64862012-07-05 05:05:04 +000091
92/* KM_PORTL2 */
93#elif defined(CONFIG_KM_PORTL2)
94#define CONFIG_IDENT_STRING "\nKeymile Port-L2"
95#define CONFIG_HOSTNAME portl2
Heiko Schocherf3e93612012-10-25 11:07:00 +020096#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck6ef64862012-07-05 05:05:04 +000097#define CONFIG_KM_PIGGY4_88E6061
98
Holger Brunck90639fe2013-01-15 22:51:22 +000099/* KM_SUV31 */
100#elif defined(CONFIG_KM_SUV31)
Heiko Schocherea818db2013-01-29 08:53:15 +0100101#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck90639fe2013-01-15 22:51:22 +0000102#define CONFIG_IDENT_STRING "\nKeymile SUV31"
103#define CONFIG_HOSTNAME kmsuv31
Holger Brunck2a4ebef2014-01-27 16:58:24 +0100104#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +0900105#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck90639fe2013-01-15 22:51:22 +0000106#define CONFIG_KM_ENV_IS_IN_SPI_NOR
107#define CONFIG_KM_FPGA_CONFIG
108
Holger Brunck8170aef2012-07-05 05:37:46 +0000109#else
110#error ("Board unsupported")
111#endif
112
Heiko Schocher67fa8c22010-02-22 16:43:02 +0530113/* include common defines/options for all arm based Keymile boards */
Valentin Longchamp264eaa02011-05-04 01:47:33 +0000114#include "km/km_arm.h"
Heiko Schocher67fa8c22010-02-22 16:43:02 +0530115
Holger Brunck8170aef2012-07-05 05:37:46 +0000116#ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR
Heiko Schocherea818db2013-01-29 08:53:15 +0100117#define KM_ENV_BUS 5 /* I2C2 (Mux-Port 5)*/
Holger Brunck8170aef2012-07-05 05:37:46 +0000118#endif
119
120#if defined(CONFIG_KM_PIGGY4_88E6352)
121/*
122 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
123 * an Marvell 88E6352 simple switch.
124 * In this case we have to change the default settings for the etherent mac.
125 * There is NO ethernet phy. The ARM and Switch are conencted directly over
126 * RGMII in MAC-MAC mode
127 * In this case 1GBit full duplex and autoneg off
128 */
129#define PORT_SERIAL_CONTROL_VALUE ( \
130 MVGBE_FORCE_LINK_PASS | \
131 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
132 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
133 MVGBE_ADV_NO_FLOW_CTRL | \
134 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
135 MVGBE_FORCE_BP_MODE_NO_JAM | \
136 (1 << 9) /* Reserved bit has to be 1 */ | \
137 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
138 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
139 MVGBE_DTE_ADV_0 | \
140 MVGBE_MIIPHY_MAC_MODE | \
141 MVGBE_AUTO_NEG_NO_CHANGE | \
142 MVGBE_MAX_RX_PACKET_1552BYTE | \
143 MVGBE_CLR_EXT_LOOPBACK | \
144 MVGBE_SET_FULL_DUPLEX_MODE | \
145 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
146 MVGBE_SET_GMII_SPEED_TO_1000 |\
147 MVGBE_SET_MII_SPEED_TO_100)
148
149#endif
Heiko Schocher731b9682011-03-08 10:53:51 +0100150
Holger Brunckf9454392012-07-05 05:05:03 +0000151#ifdef CONFIG_KM_PIGGY4_88E6061
152/*
153 * Some keymile boards like mgcoge3un have their PIGGY4 connected via
154 * an Marvell 88E6061 simple switch.
155 * In this case we have to change the default settings for the
156 * ethernet phy connected to the kirkwood.
157 * In this case 100MB full duplex and autoneg off
158 */
159#define PORT_SERIAL_CONTROL_VALUE ( \
160 MVGBE_FORCE_LINK_PASS | \
161 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
162 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
163 MVGBE_ADV_NO_FLOW_CTRL | \
164 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
165 MVGBE_FORCE_BP_MODE_NO_JAM | \
166 (1 << 9) /* Reserved bit has to be 1 */ | \
167 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
168 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
169 MVGBE_DTE_ADV_0 | \
170 MVGBE_MIIPHY_MAC_MODE | \
171 MVGBE_AUTO_NEG_NO_CHANGE | \
172 MVGBE_MAX_RX_PACKET_1552BYTE | \
173 MVGBE_CLR_EXT_LOOPBACK | \
174 MVGBE_SET_FULL_DUPLEX_MODE | \
175 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
176 MVGBE_SET_GMII_SPEED_TO_10_100 |\
177 MVGBE_SET_MII_SPEED_TO_100)
178#endif
179
Holger Brunckf9454392012-07-05 05:05:03 +0000180#ifdef CONFIG_KM_DISABLE_PCI
181#undef CONFIG_KIRKWOOD_PCIE_INIT
182#endif
Valentin Longchampb37f7722012-07-05 05:05:05 +0000183
Valentin Longchampb37f7722012-07-05 05:05:05 +0000184
Holger Brunck83b40c32011-06-16 18:11:15 +0530185#endif /* _CONFIG_KM_KIRKWOOD */