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Mike Frysinger9171fc82008-03-30 15:46:13 -04001/*
2 * U-boot - start.S Startup file for Blackfin u-boot
3 *
Mike Frysinger96092222008-10-11 21:18:10 -04004 * Copyright (c) 2005-2008 Analog Devices Inc.
Mike Frysinger9171fc82008-03-30 15:46:13 -04005 *
6 * This file is based on head.S
7 * Copyright (c) 2003 Metrowerks/Motorola
8 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
9 * Kenneth Albanowski <kjahds@kjahds.com>,
10 * The Silver Hammer Group, Ltd.
11 * (c) 1995, Dionne & Associates
12 * (c) 1995, DKG Display Tech.
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
30 * MA 02110-1301 USA
31 */
32
33#include <config.h>
34#include <asm/blackfin.h>
35#include <asm/mach-common/bits/core.h>
Mike Frysinger9171fc82008-03-30 15:46:13 -040036#include <asm/mach-common/bits/pll.h>
37
38#include "serial.h"
39
40/* It may seem odd that we make calls to functions even though we haven't
41 * relocated ourselves yet out of {flash,ram,wherever}. This is OK because
42 * the "call" instruction in the Blackfin architecture is actually PC
43 * relative. So we can call functions all we want and not worry about them
44 * not being relocated yet.
45 */
46
47.text
48ENTRY(_start)
49
50 /* Set our initial stack to L1 scratch space */
Mike Frysinger96092222008-10-11 21:18:10 -040051 sp.l = LO(L1_SRAM_SCRATCH_END - 20);
52 sp.h = HI(L1_SRAM_SCRATCH_END - 20);
Mike Frysinger9171fc82008-03-30 15:46:13 -040053
Mike Frysingerc745a842010-12-24 14:46:12 -050054 /* Optimization register tricks: keep a base value in the
55 * reserved P registers so we use the load/store with an
56 * offset syntax. R0 = [P5 + <constant>];
57 * P4 - system MMR base
58 * P5 - core MMR base
59 */
60#ifdef CONFIG_HW_WATCHDOG
61 p4.l = 0;
62 p4.h = HI(SYSMMR_BASE);
63#endif
64 p5.l = 0;
65 p5.h = HI(COREMMR_BASE);
66
Mike Frysinger9171fc82008-03-30 15:46:13 -040067#ifdef CONFIG_HW_WATCHDOG
Bob Liu49c2da52011-12-27 15:05:53 +080068#ifndef __ADSPBF60x__
Mike Frysinger9171fc82008-03-30 15:46:13 -040069# ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
70# define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
71# endif
72 /* Program the watchdog with an initial timeout of ~5 seconds.
73 * That should be long enough to bootstrap ourselves up and
74 * then the common u-boot code can take over.
75 */
Mike Frysingerc745a842010-12-24 14:46:12 -050076 r0 = 0;
77 r0.h = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START));
78 [p4 + (WDOG_CNT - SYSMMR_BASE)] = r0;
Mike Frysinger9171fc82008-03-30 15:46:13 -040079 /* fire up the watchdog - R0.L above needs to be 0x0000 */
Mike Frysingerc745a842010-12-24 14:46:12 -050080 W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
Mike Frysinger9171fc82008-03-30 15:46:13 -040081#endif
Bob Liu49c2da52011-12-27 15:05:53 +080082#endif
Mike Frysinger9171fc82008-03-30 15:46:13 -040083
84 /* Turn on the serial for debugging the init process */
85 serial_early_init
86 serial_early_set_baud
87
88 serial_early_puts("Init Registers");
89
Mike Frysinger70c4c032008-06-01 01:23:48 -040090 /* Disable self-nested interrupts and enable CYCLES for udelay() */
Mike Frysinger9171fc82008-03-30 15:46:13 -040091 R0 = CCEN | 0x30;
92 SYSCFG = R0;
93
94 /* Zero out registers required by Blackfin ABI.
95 * http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
96 */
97 r1 = 0 (x);
98 /* Disable circular buffers */
99 l0 = r1;
100 l1 = r1;
101 l2 = r1;
102 l3 = r1;
103 /* Disable hardware loops in case we were started by 'go' */
104 lc0 = r1;
105 lc1 = r1;
106
107 /* Save RETX so we can pass it while booting Linux */
108 r7 = RETX;
109
Mike Frysinger7527fee2009-11-09 19:38:23 -0500110#if CONFIG_MEM_SIZE
Mike Frysinger74398b22008-10-11 21:58:33 -0400111 /* Figure out where we are currently executing so that we can decide
112 * how to best reprogram and relocate things. We'll pass below:
113 * R4: load address of _start
114 * R5: current (not load) address of _start
Mike Frysinger9171fc82008-03-30 15:46:13 -0400115 */
Mike Frysinger74398b22008-10-11 21:58:33 -0400116 serial_early_puts("Find ourselves");
117
Mike Frysinger9171fc82008-03-30 15:46:13 -0400118 call _get_pc;
Mike Frysinger74398b22008-10-11 21:58:33 -0400119.Loffset:
120 r1.l = .Loffset;
121 r1.h = .Loffset;
122 r4.l = _start;
123 r4.h = _start;
124 r3 = r1 - r4;
125 r5 = r0 - r3;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400126
127 /* Inform upper layers if we had to do the relocation ourselves.
128 * This allows us to detect whether we were loaded by 'go 0x1000'
Mike Frysinger74398b22008-10-11 21:58:33 -0400129 * or by the bootrom from an LDR. "R6" is "loaded_from_ldr".
Mike Frysinger9171fc82008-03-30 15:46:13 -0400130 */
131 r6 = 1 (x);
Mike Frysinger74398b22008-10-11 21:58:33 -0400132 cc = r4 == r5;
133 if cc jump .Lnorelocate;
134 r6 = 0 (x);
135
Mike Frysingerc745a842010-12-24 14:46:12 -0500136 /* Turn off caches as they require CPLBs and a CPLB miss requires
137 * a software exception handler to process it. But we're about to
138 * clobber any previous executing software (like U-Boot that just
139 * launched a new U-Boot via 'go'), so any handler state will be
140 * unreliable after the memcpy below.
141 */
142 serial_early_puts("Kill Caches");
143 r0 = 0;
144 [p5 + (IMEM_CONTROL - COREMMR_BASE)] = r0;
145 [p5 + (DMEM_CONTROL - COREMMR_BASE)] = r0;
146 ssync;
147
Mike Frysinger74398b22008-10-11 21:58:33 -0400148 /* In bypass mode, we don't have an LDR with an init block
149 * so we need to explicitly call it ourselves. This will
150 * reprogram our clocks, memory, and setup our async banks.
151 */
152 serial_early_puts("Program Clocks");
153
154 /* if we're executing >=0x20000000, then we dont need to dma */
155 r3 = 0x0;
156 r3.h = 0x2000;
157 cc = r5 < r3 (iu);
158 if cc jump .Ldma_and_reprogram;
Mike Frysinger7527fee2009-11-09 19:38:23 -0500159#else
160 r6 = 1 (x); /* fake loaded_from_ldr = 1 */
161#endif
Mike Frysingerad907322009-02-13 17:10:58 -0500162 r0 = 0 (x); /* set bootstruct to NULL */
Mike Frysinger74398b22008-10-11 21:58:33 -0400163 call _initcode;
164 jump .Lprogrammed;
165
166 /* we're sitting in external memory, so dma into L1 and reprogram */
167.Ldma_and_reprogram:
168 r0.l = LO(L1_INST_SRAM);
169 r0.h = HI(L1_INST_SRAM);
Mike Frysingerb1e2c552009-11-03 06:11:31 -0500170 r1.l = __initcode_lma;
171 r1.h = __initcode_lma;
172 r2.l = __initcode_len;
173 r2.h = __initcode_len;
Mike Frysinger74398b22008-10-11 21:58:33 -0400174 r1 = r1 - r4; /* convert r1 from load address of initcode ... */
175 r1 = r1 + r5; /* ... to current (not load) address of initcode */
176 p3 = r0;
177 call _dma_memcpy_nocache;
Mike Frysingerad907322009-02-13 17:10:58 -0500178 r0 = 0 (x); /* set bootstruct to NULL */
Mike Frysinger74398b22008-10-11 21:58:33 -0400179 call (p3);
180
181 /* Since we reprogrammed SCLK, we need to update the serial divisor */
182.Lprogrammed:
183 serial_early_set_baud
Mike Frysinger9171fc82008-03-30 15:46:13 -0400184
Mike Frysinger7527fee2009-11-09 19:38:23 -0500185#if CONFIG_MEM_SIZE
Mike Frysingerb5eba3f2008-10-11 21:40:26 -0400186 /* Relocate from wherever we are (FLASH/RAM/etc...) to the hardcoded
Mike Frysingerdc2bfb02008-06-01 01:21:34 -0400187 * monitor location in the end of RAM. We know that memcpy() only
Mike Frysingerb5eba3f2008-10-11 21:40:26 -0400188 * uses registers, so it is safe to call here. Note that this only
189 * copies to external memory ... we do not start executing out of
190 * it yet (see "lower to 15" below).
Mike Frysinger9171fc82008-03-30 15:46:13 -0400191 */
192 serial_early_puts("Relocate");
Mike Frysinger74398b22008-10-11 21:58:33 -0400193 r0 = r4;
194 r1 = r5;
Mike Frysingerdc2bfb02008-06-01 01:21:34 -0400195 r2.l = LO(CONFIG_SYS_MONITOR_LEN);
196 r2.h = HI(CONFIG_SYS_MONITOR_LEN);
197 call _memcpy_ASM;
Mike Frysinger7527fee2009-11-09 19:38:23 -0500198#endif
Mike Frysinger9171fc82008-03-30 15:46:13 -0400199
200 /* Initialize BSS section ... we know that memset() does not
201 * use the BSS, so it is safe to call here. The bootrom LDR
202 * takes care of clearing things for us.
203 */
204 serial_early_puts("Zero BSS");
Mike Frysingerb1e2c552009-11-03 06:11:31 -0500205 r0.l = __bss_vma;
206 r0.h = __bss_vma;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400207 r1 = 0 (x);
Mike Frysingerb1e2c552009-11-03 06:11:31 -0500208 r2.l = __bss_len;
209 r2.h = __bss_len;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400210 call _memset;
211
212.Lnorelocate:
213
214 /* Setup the actual stack in external memory */
Mike Frysinger95433f62008-10-11 21:23:41 -0400215 sp.h = HI(CONFIG_STACKBASE);
216 sp.l = LO(CONFIG_STACKBASE);
Mike Frysinger9171fc82008-03-30 15:46:13 -0400217 fp = sp;
218
219 /* Now lower ourselves from the highest interrupt level to
220 * the lowest. We do this by masking all interrupts but 15,
Mike Frysinger70c4c032008-06-01 01:23:48 -0400221 * setting the 15 handler to ".Lenable_nested", raising the 15
Mike Frysinger9171fc82008-03-30 15:46:13 -0400222 * interrupt, and then returning from the highest interrupt
223 * level to the dummy "jump" until the interrupt controller
Mike Frysingerb5eba3f2008-10-11 21:40:26 -0400224 * services the pending 15 interrupt. If executing out of
225 * flash, these steps also changes the code flow from flash
226 * to external memory.
Mike Frysinger9171fc82008-03-30 15:46:13 -0400227 */
228 serial_early_puts("Lower to 15");
229 r0 = r7;
230 r1 = r6;
Mike Frysinger70c4c032008-06-01 01:23:48 -0400231 p1.l = .Lenable_nested;
232 p1.h = .Lenable_nested;
Mike Frysingerc745a842010-12-24 14:46:12 -0500233 [p5 + (EVT15 - COREMMR_BASE)] = p1;
Mike Frysingerbd33e5c2008-10-11 21:19:39 -0400234 r7 = EVT_IVG15 (z);
235 sti r7;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400236 raise 15;
Mike Frysingerc745a842010-12-24 14:46:12 -0500237 p3.l = .LWAIT_HERE;
238 p3.h = .LWAIT_HERE;
239 reti = p3;
Mike Frysinger9171fc82008-03-30 15:46:13 -0400240 rti;
241
Mike Frysinger70c4c032008-06-01 01:23:48 -0400242 /* Enable nested interrupts before continuing with cpu init */
243.Lenable_nested:
244 cli r7;
245 [--sp] = reti;
246 jump.l _cpu_init_f;
247
Mike Frysinger9171fc82008-03-30 15:46:13 -0400248.LWAIT_HERE:
249 jump .LWAIT_HERE;
250ENDPROC(_start)
251
252LENTRY(_get_pc)
253 r0 = rets;
254#if ANOMALY_05000371
255 NOP;
256 NOP;
257 NOP;
258#endif
259 rts;
260ENDPROC(_get_pc)