wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2004 Picture Elements, Inc. |
| 3 | * Stephen Williams (XXXXXXXXXXXXXXXX) |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 6 | */ |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 7 | |
| 8 | /* |
| 9 | * The Xilinx SystemACE chip support is activated by defining |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 10 | * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 11 | * to set the base address of the device. This code currently |
| 12 | * assumes that the chip is connected via a byte-wide bus. |
| 13 | * |
| 14 | * The CONFIG_SYSTEMACE also adds to fat support the device class |
| 15 | * "ace" that allows the user to execute "fatls ace 0" and the |
| 16 | * like. This works by making the systemace_get_dev function |
| 17 | * available to cmd_fat.c:get_dev and filling in a block device |
| 18 | * description that has all the bits needed for FAT support to |
| 19 | * read sectors. |
Wolfgang Denk | 8f79e4c | 2005-08-10 15:14:32 +0200 | [diff] [blame] | 20 | * |
Wolfgang Denk | fe599e1 | 2005-08-07 23:55:50 +0200 | [diff] [blame] | 21 | * According to Xilinx technical support, before accessing the |
| 22 | * SystemACE CF you need to set the following control bits: |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 23 | * FORCECFGMODE : 1 |
| 24 | * CFGMODE : 0 |
| 25 | * CFGSTART : 0 |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 26 | */ |
| 27 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 28 | #include <common.h> |
| 29 | #include <command.h> |
| 30 | #include <systemace.h> |
| 31 | #include <part.h> |
| 32 | #include <asm/io.h> |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 33 | |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 34 | /* |
| 35 | * The ace_readw and writew functions read/write 16bit words, but the |
| 36 | * offset value is the BYTE offset as most used in the Xilinx |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 37 | * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 38 | * to be the base address for the chip, usually in the local |
| 39 | * peripheral bus. |
| 40 | */ |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 41 | |
Michal Simek | 5340a7f | 2012-07-04 12:09:45 +0200 | [diff] [blame] | 42 | static u32 base = CONFIG_SYS_SYSTEMACE_BASE; |
| 43 | static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH; |
| 44 | |
| 45 | static void ace_writew(u16 val, unsigned off) |
| 46 | { |
| 47 | if (width == 8) { |
| 48 | #if !defined(__BIG_ENDIAN) |
| 49 | writeb(val >> 8, base + off); |
| 50 | writeb(val, base + off + 1); |
| 51 | #else |
| 52 | writeb(val, base + off); |
| 53 | writeb(val >> 8, base + off + 1); |
| 54 | #endif |
Alexey Brodkin | 7cde9f3 | 2013-01-03 13:35:23 +0400 | [diff] [blame] | 55 | } else |
| 56 | out16(base + off, val); |
Michal Simek | 5340a7f | 2012-07-04 12:09:45 +0200 | [diff] [blame] | 57 | } |
| 58 | |
| 59 | static u16 ace_readw(unsigned off) |
| 60 | { |
| 61 | if (width == 8) { |
| 62 | #if !defined(__BIG_ENDIAN) |
| 63 | return (readb(base + off) << 8) | readb(base + off + 1); |
| 64 | #else |
| 65 | return readb(base + off) | (readb(base + off + 1) << 8); |
| 66 | #endif |
| 67 | } |
| 68 | |
| 69 | return in16(base + off); |
| 70 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 71 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 72 | static unsigned long systemace_read(int dev, unsigned long start, |
Alexey Brodkin | ac1048a | 2013-01-03 01:02:46 +0000 | [diff] [blame] | 73 | lbaint_t blkcnt, void *buffer); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 74 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 75 | static block_dev_desc_t systemace_dev = { 0 }; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 76 | |
| 77 | static int get_cf_lock(void) |
| 78 | { |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 79 | int retry = 10; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 80 | |
| 81 | /* CONTROLREG = LOCKREG */ |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 82 | unsigned val = ace_readw(0x18); |
| 83 | val |= 0x0002; |
| 84 | ace_writew((val & 0xffff), 0x18); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 85 | |
| 86 | /* Wait for MPULOCK in STATUSREG[15:0] */ |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 87 | while (!(ace_readw(0x04) & 0x0002)) { |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 88 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 89 | if (retry < 0) |
| 90 | return -1; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 91 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 92 | udelay(100000); |
| 93 | retry -= 1; |
| 94 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 95 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 96 | return 0; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | static void release_cf_lock(void) |
| 100 | { |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 101 | unsigned val = ace_readw(0x18); |
| 102 | val &= ~(0x0002); |
| 103 | ace_writew((val & 0xffff), 0x18); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 104 | } |
| 105 | |
Matthew McClintock | df3fc52 | 2011-05-24 05:31:19 +0000 | [diff] [blame] | 106 | #ifdef CONFIG_PARTITIONS |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 107 | block_dev_desc_t *systemace_get_dev(int dev) |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 108 | { |
| 109 | /* The first time through this, the systemace_dev object is |
| 110 | not yet initialized. In that case, fill it in. */ |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 111 | if (systemace_dev.blksz == 0) { |
| 112 | systemace_dev.if_type = IF_TYPE_UNKNOWN; |
| 113 | systemace_dev.dev = 0; |
| 114 | systemace_dev.part_type = PART_TYPE_UNKNOWN; |
| 115 | systemace_dev.type = DEV_TYPE_HARDDISK; |
| 116 | systemace_dev.blksz = 512; |
Egbert Eich | 0472fbf | 2013-04-09 21:11:56 +0000 | [diff] [blame] | 117 | systemace_dev.log2blksz = LOG2(systemace_dev.blksz); |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 118 | systemace_dev.removable = 1; |
| 119 | systemace_dev.block_read = systemace_read; |
Wolfgang Denk | fe599e1 | 2005-08-07 23:55:50 +0200 | [diff] [blame] | 120 | |
Stefan Roese | d93e221 | 2007-02-20 13:17:42 +0100 | [diff] [blame] | 121 | /* |
Stefan Roese | 8274ec0 | 2007-02-22 07:40:23 +0100 | [diff] [blame] | 122 | * Ensure the correct bus mode (8/16 bits) gets enabled |
Stefan Roese | d93e221 | 2007-02-20 13:17:42 +0100 | [diff] [blame] | 123 | */ |
Michal Simek | 5340a7f | 2012-07-04 12:09:45 +0200 | [diff] [blame] | 124 | ace_writew(width == 8 ? 0 : 0x0001, 0); |
Stefan Roese | d93e221 | 2007-02-20 13:17:42 +0100 | [diff] [blame] | 125 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 126 | init_part(&systemace_dev); |
Wolfgang Denk | fe599e1 | 2005-08-07 23:55:50 +0200 | [diff] [blame] | 127 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 128 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 129 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 130 | return &systemace_dev; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 131 | } |
Matthew McClintock | df3fc52 | 2011-05-24 05:31:19 +0000 | [diff] [blame] | 132 | #endif |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 133 | |
| 134 | /* |
| 135 | * This function is called (by dereferencing the block_read pointer in |
| 136 | * the dev_desc) to read blocks of data. The return value is the |
| 137 | * number of blocks read. A zero return indicates an error. |
| 138 | */ |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 139 | static unsigned long systemace_read(int dev, unsigned long start, |
Alexey Brodkin | ac1048a | 2013-01-03 01:02:46 +0000 | [diff] [blame] | 140 | lbaint_t blkcnt, void *buffer) |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 141 | { |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 142 | int retry; |
| 143 | unsigned blk_countdown; |
Grant Likely | eb867a7 | 2007-02-20 09:05:45 +0100 | [diff] [blame] | 144 | unsigned char *dp = buffer; |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 145 | unsigned val; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 146 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 147 | if (get_cf_lock() < 0) { |
| 148 | unsigned status = ace_readw(0x04); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 149 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 150 | /* If CFDETECT is false, card is missing. */ |
| 151 | if (!(status & 0x0010)) { |
| 152 | printf("** CompactFlash card not present. **\n"); |
| 153 | return 0; |
| 154 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 155 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 156 | printf("**** ACE locked away from me (STATUSREG=%04x)\n", |
| 157 | status); |
| 158 | return 0; |
| 159 | } |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 160 | #ifdef DEBUG_SYSTEMACE |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 161 | printf("... systemace read %lu sectors at %lu\n", blkcnt, start); |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 162 | #endif |
| 163 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 164 | retry = 2000; |
| 165 | for (;;) { |
| 166 | val = ace_readw(0x04); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 167 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 168 | /* If CFDETECT is false, card is missing. */ |
| 169 | if (!(val & 0x0010)) { |
| 170 | printf("**** ACE CompactFlash not found.\n"); |
| 171 | release_cf_lock(); |
| 172 | return 0; |
| 173 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 174 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 175 | /* If RDYFORCMD, then we are ready to go. */ |
| 176 | if (val & 0x0100) |
| 177 | break; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 178 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 179 | if (retry < 0) { |
| 180 | printf("**** SystemACE not ready.\n"); |
| 181 | release_cf_lock(); |
| 182 | return 0; |
| 183 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 184 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 185 | udelay(1000); |
| 186 | retry -= 1; |
| 187 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 188 | |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 189 | /* The SystemACE can only transfer 256 sectors at a time, so |
| 190 | limit the current chunk of sectors. The blk_countdown |
| 191 | variable is the number of sectors left to transfer. */ |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 192 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 193 | blk_countdown = blkcnt; |
| 194 | while (blk_countdown > 0) { |
| 195 | unsigned trans = blk_countdown; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 196 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 197 | if (trans > 256) |
| 198 | trans = 256; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 199 | |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 200 | #ifdef DEBUG_SYSTEMACE |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 201 | printf("... transfer %lu sector in a chunk\n", trans); |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 202 | #endif |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 203 | /* Write LBA block address */ |
| 204 | ace_writew((start >> 0) & 0xffff, 0x10); |
Stefan Roese | d93e221 | 2007-02-20 13:17:42 +0100 | [diff] [blame] | 205 | ace_writew((start >> 16) & 0x0fff, 0x12); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 206 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 207 | /* NOTE: in the Write Sector count below, a count of 0 |
| 208 | causes a transfer of 256, so &0xff gives the right |
| 209 | value for whatever transfer count we want. */ |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 210 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 211 | /* Write sector count | ReadMemCardData. */ |
| 212 | ace_writew((trans & 0xff) | 0x0300, 0x14); |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 213 | |
Wolfgang Denk | d62f64c | 2007-05-16 00:13:33 +0200 | [diff] [blame] | 214 | /* |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 215 | * For FPGA configuration via SystemACE is reset unacceptable |
| 216 | * CFGDONE bit in STATUSREG is not set to 1. |
| 217 | */ |
| 218 | #ifndef SYSTEMACE_CONFIG_FPGA |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 219 | /* Reset the configruation controller */ |
| 220 | val = ace_readw(0x18); |
| 221 | val |= 0x0080; |
| 222 | ace_writew(val, 0x18); |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 223 | #endif |
Wolfgang Denk | fe599e1 | 2005-08-07 23:55:50 +0200 | [diff] [blame] | 224 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 225 | retry = trans * 16; |
| 226 | while (retry > 0) { |
| 227 | int idx; |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 228 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 229 | /* Wait for buffer to become ready. */ |
| 230 | while (!(ace_readw(0x04) & 0x0020)) { |
| 231 | udelay(100); |
| 232 | } |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 233 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 234 | /* Read 16 words of 2bytes from the sector buffer. */ |
| 235 | for (idx = 0; idx < 16; idx += 1) { |
| 236 | unsigned short val = ace_readw(0x40); |
| 237 | *dp++ = val & 0xff; |
| 238 | *dp++ = (val >> 8) & 0xff; |
| 239 | } |
wdenk | e7c8568 | 2004-02-27 08:21:54 +0000 | [diff] [blame] | 240 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 241 | retry -= 1; |
| 242 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 243 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 244 | /* Clear the configruation controller reset */ |
| 245 | val = ace_readw(0x18); |
| 246 | val &= ~0x0080; |
| 247 | ace_writew(val, 0x18); |
Wolfgang Denk | fe599e1 | 2005-08-07 23:55:50 +0200 | [diff] [blame] | 248 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 249 | /* Count the blocks we transfer this time. */ |
| 250 | start += trans; |
| 251 | blk_countdown -= trans; |
| 252 | } |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 253 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 254 | release_cf_lock(); |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 255 | |
Grant Likely | 984618f | 2007-02-20 09:05:16 +0100 | [diff] [blame] | 256 | return blkcnt; |
wdenk | 3f85ce2 | 2004-02-23 16:11:30 +0000 | [diff] [blame] | 257 | } |