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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glass69d59b42013-03-05 14:39:35 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 *
5 * (C) Copyright 2000 - 2002
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Simon Glass69d59b42013-03-05 14:39:35 +00007 ********************************************************************
8 * NOTE: This header file defines an interface to U-Boot. Including
9 * this (unmodified) header file in another file is considered normal
10 * use of U-Boot, and does *not* fall under the heading of "derived
11 * work".
12 ********************************************************************
13 */
14
15#ifndef __ASM_GENERIC_U_BOOT_H__
16#define __ASM_GENERIC_U_BOOT_H__
17
18/*
19 * Board information passed to Linux kernel from U-Boot
20 *
21 * include/asm-ppc/u-boot.h
22 */
23
24#ifndef __ASSEMBLY__
25
Masahiro Yamada4ca281a2020-02-25 02:24:17 +090026#include <linux/types.h>
27
Simon Glass69d59b42013-03-05 14:39:35 +000028typedef struct bd_info {
29 unsigned long bi_memstart; /* start of DRAM memory */
30 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
31 unsigned long bi_flashstart; /* start of FLASH memory */
32 unsigned long bi_flashsize; /* size of FLASH memory */
33 unsigned long bi_flashoffset; /* reserved area for startup monitor */
34 unsigned long bi_sramstart; /* start of SRAM memory */
35 unsigned long bi_sramsize; /* size of SRAM memory */
36#ifdef CONFIG_ARM
37 unsigned long bi_arm_freq; /* arm frequency */
38 unsigned long bi_dsp_freq; /* dsp core frequency */
39 unsigned long bi_ddr_freq; /* ddr frequency */
40#endif
Christophe Leroyee1e6002018-03-16 17:20:41 +010041#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
Simon Glass69d59b42013-03-05 14:39:35 +000042 unsigned long bi_immr_base; /* base of IMMR register */
43#endif
Heiko Schocher064b55c2017-06-14 05:49:40 +020044#if defined(CONFIG_M68K)
Simon Glass69d59b42013-03-05 14:39:35 +000045 unsigned long bi_mbar_base; /* base of internal registers */
46#endif
47#if defined(CONFIG_MPC83xx)
48 unsigned long bi_immrbar;
49#endif
Simon Glass69d59b42013-03-05 14:39:35 +000050 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
51 unsigned long bi_ip_addr; /* IP Address */
52 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
53 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
54 unsigned long bi_intfreq; /* Internal Freq, in MHz */
55 unsigned long bi_busfreq; /* Bus Freq, in MHz */
56#if defined(CONFIG_CPM2)
57 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
58 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
59 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
60 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
61#endif
Heiko Schocher064b55c2017-06-14 05:49:40 +020062#if defined(CONFIG_M68K)
Simon Glass69d59b42013-03-05 14:39:35 +000063 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
64 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
65#endif
Alison Wang1313db42015-02-12 18:33:15 +080066#if defined(CONFIG_EXTRA_CLOCK)
67 unsigned long bi_inpfreq; /* input Freq in MHz */
68 unsigned long bi_vcofreq; /* vco Freq in MHz */
69 unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
70#endif
Simon Glass69d59b42013-03-05 14:39:35 +000071
72#ifdef CONFIG_HAS_ETH1
73 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
74#endif
75#ifdef CONFIG_HAS_ETH2
76 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
77#endif
78#ifdef CONFIG_HAS_ETH3
79 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
80#endif
81#ifdef CONFIG_HAS_ETH4
82 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
83#endif
84#ifdef CONFIG_HAS_ETH5
85 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
86#endif
87
Simon Glass69d59b42013-03-05 14:39:35 +000088 ulong bi_arch_number; /* unique id for this board */
89 ulong bi_boot_params; /* where this board expects params */
90#ifdef CONFIG_NR_DRAM_BANKS
91 struct { /* RAM configuration */
Bin Meng715f5992015-08-06 01:31:20 -070092 phys_addr_t start;
93 phys_size_t size;
Simon Glass69d59b42013-03-05 14:39:35 +000094 } bi_dram[CONFIG_NR_DRAM_BANKS];
95#endif /* CONFIG_NR_DRAM_BANKS */
96} bd_t;
97
98#endif /* __ASSEMBLY__ */
99
100#endif /* __ASM_GENERIC_U_BOOT_H__ */