wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Texas Instruments. |
| 4 | * Kshitij Gupta <kshitij@ti.com> |
| 5 | * Configuation settings for the TI OMAP Innovator board. |
| 6 | * |
| 7 | * (C) Copyright 2004 |
| 8 | * ARM Ltd. |
| 9 | * Philippe Robin, <philippe.robin@arm.com> |
| 10 | * Configuration for Versatile PB. |
| 11 | * |
Wolfgang Denk | 3765b3e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 12 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #ifndef __CONFIG_H |
| 16 | #define __CONFIG_H |
| 17 | |
| 18 | /* |
| 19 | * High Level Configuration Options |
| 20 | * (easy to change) |
| 21 | */ |
Masahiro Yamada | 5d7b131 | 2014-11-06 14:59:36 +0900 | [diff] [blame] | 22 | #define CONFIG_VERSATILE 1 /* This is Versatile Platform Board */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 23 | #define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 24 | |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_MEMTEST_START 0x100000 |
| 26 | #define CONFIG_SYS_MEMTEST_END 0x10000000 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 27 | |
Rob Herring | 5b6da28 | 2013-10-04 10:22:48 -0500 | [diff] [blame] | 28 | #define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */ |
| 29 | #define CONFIG_SYS_TIMER_RATE (1000000 / 256) |
| 30 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) |
| 31 | #define CONFIG_SYS_TIMER_COUNTS_DOWN |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * control registers |
| 35 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 36 | #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 37 | |
| 38 | /* |
| 39 | * System controller bit assignment |
| 40 | */ |
| 41 | #define VERSATILE_REFCLK 0 |
| 42 | #define VERSATILE_TIMCLK 1 |
| 43 | |
| 44 | #define VERSATILE_TIMER1_EnSel 15 |
| 45 | #define VERSATILE_TIMER2_EnSel 17 |
| 46 | #define VERSATILE_TIMER3_EnSel 19 |
| 47 | #define VERSATILE_TIMER4_EnSel 21 |
| 48 | |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 49 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 50 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 51 | #define CONFIG_MISC_INIT_R 1 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 52 | /* |
| 53 | * Size of malloc() pool |
| 54 | */ |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 55 | #define CONFIG_ENV_SIZE 8192 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 56 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 57 | |
| 58 | /* |
| 59 | * Hardware drivers |
| 60 | */ |
| 61 | |
Ben Warren | 7194ab8 | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 62 | #define CONFIG_SMC91111 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 63 | #define CONFIG_SMC_USE_32_BIT |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 64 | #define CONFIG_SMC91111_BASE 0x10010000 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 65 | #undef CONFIG_SMC91111_EXT_PHY |
| 66 | |
| 67 | /* |
| 68 | * NS16550 Configuration |
| 69 | */ |
Andreas Engel | 48d0192 | 2008-09-08 14:30:53 +0200 | [diff] [blame] | 70 | #define CONFIG_PL011_SERIAL |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 71 | #define CONFIG_PL011_CLOCK 24000000 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 72 | #define CONFIG_PL01x_PORTS \ |
| 73 | {(void *)CONFIG_SYS_SERIAL0, \ |
| 74 | (void *)CONFIG_SYS_SERIAL1 } |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 75 | #define CONFIG_CONS_INDEX 0 |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 76 | |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 77 | #define CONFIG_BAUDRATE 38400 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | #define CONFIG_SYS_SERIAL0 0x101F1000 |
| 79 | #define CONFIG_SYS_SERIAL1 0x101F2000 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 80 | |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 81 | /* |
| 82 | * Command line configuration. |
| 83 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 84 | #define CONFIG_CMD_BDI |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 85 | #define CONFIG_CMD_DHCP |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 86 | #define CONFIG_CMD_FLASH |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 87 | #define CONFIG_CMD_IMI |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 88 | #define CONFIG_CMD_MEMORY |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 89 | #define CONFIG_CMD_NET |
| 90 | #define CONFIG_CMD_PING |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 91 | #define CONFIG_CMD_SAVEENV |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 92 | |
Jon Loeliger | d3b8c1a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 93 | /* |
| 94 | * BOOTP options |
| 95 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 96 | #define CONFIG_BOOTP_BOOTPATH |
Jon Loeliger | d3b8c1a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 97 | #define CONFIG_BOOTP_GATEWAY |
| 98 | #define CONFIG_BOOTP_HOSTNAME |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 99 | #define CONFIG_BOOTP_SUBNETMASK |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 100 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 101 | #define CONFIG_BOOTDELAY 2 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 102 | #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\ |
Linus Walleij | 7d7c497 | 2013-11-27 10:33:49 +0100 | [diff] [blame] | 103 | "netdev=25,0,0xf1010000,0xf1010010,eth0 "\ |
| 104 | "console=ttyAMA0,38400n1" |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 105 | |
| 106 | /* |
| 107 | * Static configuration when assigning fixed address |
| 108 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 109 | #define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 110 | |
| 111 | /* |
| 112 | * Miscellaneous configurable options |
| 113 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 114 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 115 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | d6e8ed8 | 2009-05-02 11:53:49 +0200 | [diff] [blame] | 116 | /* Monitor Command Prompt */ |
| 117 | #ifdef CONFIG_ARCH_VERSATILE_AB |
| 118 | # define CONFIG_SYS_PROMPT "VersatileAB # " |
| 119 | #else |
| 120 | # define CONFIG_SYS_PROMPT "VersatilePB # " |
| 121 | #endif |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 122 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 123 | #define CONFIG_SYS_PBSIZE \ |
| 124 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 125 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 126 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 127 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 128 | #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 129 | |
| 130 | /*----------------------------------------------------------------------- |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 131 | * Physical Memory Map |
| 132 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 133 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 134 | #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ |
| 135 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 136 | #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 137 | |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 138 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 139 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00800000 |
| 140 | #define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF |
| 141 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
| 142 | GENERATED_GBL_DATA_SIZE) |
| 143 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 144 | CONFIG_SYS_GBL_DATA_OFFSET) |
| 145 | |
| 146 | #define CONFIG_BOARD_EARLY_INIT_F |
| 147 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 148 | /*----------------------------------------------------------------------- |
| 149 | * FLASH and environment organization |
| 150 | */ |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 151 | #ifdef CONFIG_ARCH_VERSATILE_QEMU |
| 152 | #define CONFIG_SYS_TEXT_BASE 0x10000 |
| 153 | #define CONFIG_SYS_NO_FLASH |
| 154 | #define CONFIG_ENV_IS_NOWHERE |
| 155 | #define CONFIG_SYS_MONITOR_LEN 0x80000 |
| 156 | #else |
| 157 | #define CONFIG_SYS_TEXT_BASE 0x01000000 |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 158 | /* |
| 159 | * Use the CFI flash driver for ease of use |
| 160 | */ |
| 161 | #define CONFIG_SYS_FLASH_CFI |
| 162 | #define CONFIG_FLASH_CFI_DRIVER |
| 163 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 164 | /* |
| 165 | * System control register |
| 166 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 167 | #define VERSATILE_SYS_BASE 0x10000000 |
| 168 | #define VERSATILE_SYS_FLASH_OFFSET 0x4C |
| 169 | #define VERSATILE_FLASHCTRL \ |
| 170 | (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) |
| 171 | /* Enable writing to flash */ |
| 172 | #define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 173 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 174 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 175 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ |
| 176 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 177 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 178 | /* |
| 179 | * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block |
| 180 | * i.e. |
| 181 | * the bottom "sector" (bottom boot), or top "sector" |
| 182 | * (top boot), is a seperate erase region divided into |
| 183 | * 4 (equal) smaller sectors. This, notionally, allows |
| 184 | * quicker erase/rewrire of the most frequently changed |
| 185 | * area...... |
| 186 | * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4 |
| 187 | */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 188 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 189 | #ifdef CONFIG_ARCH_VERSATILE_AB |
| 190 | #define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */ |
| 191 | #define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE) |
| 192 | #define CONFIG_SYS_MAX_FLASH_SECT (520) |
| 193 | #endif |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 194 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 195 | #ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */ |
| 196 | #define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */ |
| 197 | #define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE |
| 198 | #define CONFIG_SYS_MAX_FLASH_SECT (260) |
| 199 | #endif |
| 200 | |
| 201 | #define CONFIG_SYS_FLASH_BASE 0x34000000 |
| 202 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 203 | |
| 204 | #define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE) |
| 205 | |
| 206 | /* The ARM Boot Monitor is shipped in the lowest sector of flash */ |
| 207 | |
| 208 | #define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 209 | #define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE) |
| 210 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) |
| 211 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN) |
| 212 | |
| 213 | #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ |
| 214 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ |
| 215 | |
402jagan@gmail.com | de1f9ac | 2012-07-29 04:26:08 +0000 | [diff] [blame] | 216 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 217 | #endif |
| 218 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 219 | #endif /* __CONFIG_H */ |