blob: 900b89c997807a70968f9b0d1d7fa61c2bf1cd51 [file] [log] [blame]
wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Versatile PB.
11 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020012 * SPDX-License-Identifier: GPL-2.0+
wdenk3d3befa2004-03-14 15:06:13 +000013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * High Level Configuration Options
20 * (easy to change)
21 */
Masahiro Yamada5d7b1312014-11-06 14:59:36 +090022#define CONFIG_VERSATILE 1 /* This is Versatile Platform Board */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020023#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
wdenk3d3befa2004-03-14 15:06:13 +000024
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020025#define CONFIG_SYS_MEMTEST_START 0x100000
26#define CONFIG_SYS_MEMTEST_END 0x10000000
wdenk3d3befa2004-03-14 15:06:13 +000027
Rob Herring5b6da282013-10-04 10:22:48 -050028#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
29#define CONFIG_SYS_TIMER_RATE (1000000 / 256)
30#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
31#define CONFIG_SYS_TIMER_COUNTS_DOWN
wdenk3d3befa2004-03-14 15:06:13 +000032
33/*
34 * control registers
35 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020036#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
wdenk3d3befa2004-03-14 15:06:13 +000037
38/*
39 * System controller bit assignment
40 */
41#define VERSATILE_REFCLK 0
42#define VERSATILE_TIMCLK 1
43
44#define VERSATILE_TIMER1_EnSel 15
45#define VERSATILE_TIMER2_EnSel 17
46#define VERSATILE_TIMER3_EnSel 19
47#define VERSATILE_TIMER4_EnSel 21
48
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020049#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
wdenk3d3befa2004-03-14 15:06:13 +000050#define CONFIG_SETUP_MEMORY_TAGS 1
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020051#define CONFIG_MISC_INIT_R 1
wdenk3d3befa2004-03-14 15:06:13 +000052/*
53 * Size of malloc() pool
54 */
Stefano Babicd3882982011-06-24 03:04:38 +000055#define CONFIG_ENV_SIZE 8192
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020056#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
wdenk3d3befa2004-03-14 15:06:13 +000057
58/*
59 * Hardware drivers
60 */
61
Ben Warren7194ab82009-10-04 22:37:03 -070062#define CONFIG_SMC91111
wdenk3d3befa2004-03-14 15:06:13 +000063#define CONFIG_SMC_USE_32_BIT
Wolfgang Denk53677ef2008-05-20 16:00:29 +020064#define CONFIG_SMC91111_BASE 0x10010000
wdenk3d3befa2004-03-14 15:06:13 +000065#undef CONFIG_SMC91111_EXT_PHY
66
67/*
68 * NS16550 Configuration
69 */
Andreas Engel48d01922008-09-08 14:30:53 +020070#define CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +000071#define CONFIG_PL011_CLOCK 24000000
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020072#define CONFIG_PL01x_PORTS \
73 {(void *)CONFIG_SYS_SERIAL0, \
74 (void *)CONFIG_SYS_SERIAL1 }
wdenk3d3befa2004-03-14 15:06:13 +000075#define CONFIG_CONS_INDEX 0
wdenk6705d812004-08-02 23:22:59 +000076
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020077#define CONFIG_BAUDRATE 38400
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_SERIAL0 0x101F1000
79#define CONFIG_SYS_SERIAL1 0x101F2000
wdenk3d3befa2004-03-14 15:06:13 +000080
Jon Loeligerdca3b3d2007-07-04 22:33:46 -050081/*
82 * Command line configuration.
83 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020084#define CONFIG_CMD_BDI
Jon Loeligerdca3b3d2007-07-04 22:33:46 -050085#define CONFIG_CMD_DHCP
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020086#define CONFIG_CMD_FLASH
Jon Loeligerdca3b3d2007-07-04 22:33:46 -050087#define CONFIG_CMD_IMI
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020088#define CONFIG_CMD_MEMORY
Jon Loeligerdca3b3d2007-07-04 22:33:46 -050089#define CONFIG_CMD_NET
90#define CONFIG_CMD_PING
Mike Frysingerbdab39d2009-01-28 19:08:14 -050091#define CONFIG_CMD_SAVEENV
Jon Loeligerdca3b3d2007-07-04 22:33:46 -050092
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -050093/*
94 * BOOTP options
95 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020096#define CONFIG_BOOTP_BOOTPATH
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -050097#define CONFIG_BOOTP_GATEWAY
98#define CONFIG_BOOTP_HOSTNAME
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020099#define CONFIG_BOOTP_SUBNETMASK
wdenk3d3befa2004-03-14 15:06:13 +0000100
wdenk3d3befa2004-03-14 15:06:13 +0000101#define CONFIG_BOOTDELAY 2
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200102#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\
Linus Walleij7d7c4972013-11-27 10:33:49 +0100103 "netdev=25,0,0xf1010000,0xf1010010,eth0 "\
104 "console=ttyAMA0,38400n1"
wdenk3d3befa2004-03-14 15:06:13 +0000105
106/*
107 * Static configuration when assigning fixed address
108 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200109#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
wdenk3d3befa2004-03-14 15:06:13 +0000110
111/*
112 * Miscellaneous configurable options
113 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200114#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200115#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARDd6e8ed82009-05-02 11:53:49 +0200116/* Monitor Command Prompt */
117#ifdef CONFIG_ARCH_VERSATILE_AB
118# define CONFIG_SYS_PROMPT "VersatileAB # "
119#else
120# define CONFIG_SYS_PROMPT "VersatilePB # "
121#endif
wdenk3d3befa2004-03-14 15:06:13 +0000122/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200123#define CONFIG_SYS_PBSIZE \
124 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
125#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
126#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk3d3befa2004-03-14 15:06:13 +0000127
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
wdenk3d3befa2004-03-14 15:06:13 +0000129
130/*-----------------------------------------------------------------------
wdenk3d3befa2004-03-14 15:06:13 +0000131 * Physical Memory Map
132 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200133#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
134#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
135#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200136#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
wdenk3d3befa2004-03-14 15:06:13 +0000137
Stefano Babicd3882982011-06-24 03:04:38 +0000138#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
139#define CONFIG_SYS_INIT_RAM_ADDR 0x00800000
140#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF
141#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
142 GENERATED_GBL_DATA_SIZE)
143#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
144 CONFIG_SYS_GBL_DATA_OFFSET)
145
146#define CONFIG_BOARD_EARLY_INIT_F
147
wdenk3d3befa2004-03-14 15:06:13 +0000148/*-----------------------------------------------------------------------
149 * FLASH and environment organization
150 */
Stefano Babicd3882982011-06-24 03:04:38 +0000151#ifdef CONFIG_ARCH_VERSATILE_QEMU
152#define CONFIG_SYS_TEXT_BASE 0x10000
153#define CONFIG_SYS_NO_FLASH
154#define CONFIG_ENV_IS_NOWHERE
155#define CONFIG_SYS_MONITOR_LEN 0x80000
156#else
157#define CONFIG_SYS_TEXT_BASE 0x01000000
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200158/*
159 * Use the CFI flash driver for ease of use
160 */
161#define CONFIG_SYS_FLASH_CFI
162#define CONFIG_FLASH_CFI_DRIVER
163#define CONFIG_ENV_IS_IN_FLASH 1
164/*
165 * System control register
166 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200167#define VERSATILE_SYS_BASE 0x10000000
168#define VERSATILE_SYS_FLASH_OFFSET 0x4C
169#define VERSATILE_FLASHCTRL \
170 (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
171/* Enable writing to flash */
172#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0)
wdenkd407bf52004-10-11 22:51:13 +0000173
wdenk3d3befa2004-03-14 15:06:13 +0000174/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200175#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
176#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
wdenk3d3befa2004-03-14 15:06:13 +0000177
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200178/*
179 * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
180 * i.e.
181 * the bottom "sector" (bottom boot), or top "sector"
182 * (top boot), is a seperate erase region divided into
183 * 4 (equal) smaller sectors. This, notionally, allows
184 * quicker erase/rewrire of the most frequently changed
185 * area......
186 * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
187 */
wdenk3d3befa2004-03-14 15:06:13 +0000188
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200189#ifdef CONFIG_ARCH_VERSATILE_AB
190#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */
191#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE)
192#define CONFIG_SYS_MAX_FLASH_SECT (520)
193#endif
wdenkd407bf52004-10-11 22:51:13 +0000194
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200195#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
196#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
197#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE
198#define CONFIG_SYS_MAX_FLASH_SECT (260)
199#endif
200
201#define CONFIG_SYS_FLASH_BASE 0x34000000
202#define CONFIG_SYS_MAX_FLASH_BANKS 1
203
204#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE)
205
206/* The ARM Boot Monitor is shipped in the lowest sector of flash */
207
208#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200209#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE)
210#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
211#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
212
213#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
214#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
215
402jagan@gmail.comde1f9ac2012-07-29 04:26:08 +0000216#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
Stefano Babicd3882982011-06-24 03:04:38 +0000217#endif
218
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200219#endif /* __CONFIG_H */