| Bin Meng | afee3fb | 2015-02-02 22:35:28 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * board/config.h - configuration options, board specific |
| 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
| 14 | #include <configs/x86-common.h> |
| 15 | |
| 16 | #define CONFIG_SYS_MONITOR_LEN (1 << 20) |
| 17 | #define CONFIG_BOARD_EARLY_INIT_F |
| 18 | |
| 19 | #define CONFIG_NR_DRAM_BANKS 1 |
| 20 | |
| 21 | #define CONFIG_X86_SERIAL |
| 22 | |
| 23 | /* ns16550 UART is memory-mapped in Quark SoC */ |
| 24 | #undef CONFIG_SYS_NS16550_PORT_MAPPED |
| 25 | |
| 26 | #define CONFIG_PCI_MEM_BUS 0x90000000 |
| 27 | #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS |
| 28 | #define CONFIG_PCI_MEM_SIZE 0x20000000 |
| 29 | |
| 30 | #define CONFIG_PCI_PREF_BUS 0xb0000000 |
| 31 | #define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS |
| 32 | #define CONFIG_PCI_PREF_SIZE 0x20000000 |
| 33 | |
| 34 | #define CONFIG_PCI_IO_BUS 0x2000 |
| 35 | #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS |
| 36 | #define CONFIG_PCI_IO_SIZE 0xe000 |
| 37 | |
| 38 | #define CONFIG_SYS_EARLY_PCI_INIT |
| 39 | #define CONFIG_PCI_PNP |
| 40 | |
| 41 | #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ |
| 42 | "stdout=serial\0" \ |
| 43 | "stderr=serial\0" |
| 44 | |
| 45 | /* SATA is not supported in Quark SoC */ |
| 46 | #undef CONFIG_SCSI_AHCI |
| 47 | #undef CONFIG_CMD_SCSI |
| 48 | |
| 49 | /* Video is not supported in Quark SoC */ |
| 50 | #undef CONFIG_VIDEO |
| 51 | #undef CONFIG_CFB_CONSOLE |
| 52 | |
| Bin Meng | 6df7ffe | 2015-02-04 16:26:13 +0800 | [diff] [blame] | 53 | /* SD/MMC support */ |
| 54 | #define CONFIG_MMC |
| 55 | #define CONFIG_SDHCI |
| 56 | #define CONFIG_GENERIC_MMC |
| 57 | #define CONFIG_MMC_SDMA |
| 58 | #define CONFIG_CMD_MMC |
| 59 | |
| Bin Meng | afee3fb | 2015-02-02 22:35:28 +0800 | [diff] [blame] | 60 | #endif /* __CONFIG_H */ |