wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include "cpciiser4.h" |
| 26 | #include <asm/processor.h> |
| 27 | #include <command.h> |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 28 | |
Wolfgang Denk | d87080b | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
stroese | 20aacbf | 2004-12-16 18:35:14 +0000 | [diff] [blame] | 31 | extern void lxt971_no_sleep(void); |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 32 | |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 33 | |
| 34 | /* ------------------------------------------------------------------------- */ |
| 35 | |
| 36 | #if 0 |
| 37 | #define FPGA_DEBUG |
| 38 | #endif |
| 39 | |
| 40 | #if 0 |
| 41 | #define FPGA_DEBUG2 |
| 42 | #endif |
| 43 | |
| 44 | /* fpga configuration data - generated by bin2cc */ |
| 45 | const unsigned char fpgadata[] = { |
| 46 | #include "fpgadata.c" |
| 47 | }; |
| 48 | |
| 49 | /* |
| 50 | * include common fpga code (for esd boards) |
| 51 | */ |
| 52 | #include "../common/fpga.c" |
| 53 | |
| 54 | |
wdenk | c837dcb | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 55 | int board_early_init_f (void) |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 56 | { |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 57 | int index, len, i; |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 58 | int status; |
| 59 | |
| 60 | #ifdef FPGA_DEBUG |
| 61 | /* set up serial port with default baudrate */ |
| 62 | (void) get_clocks (); |
| 63 | gd->baudrate = CONFIG_BAUDRATE; |
| 64 | serial_init (); |
| 65 | console_init_f (); |
| 66 | #endif |
| 67 | |
| 68 | /* |
| 69 | * Boot onboard FPGA |
| 70 | */ |
| 71 | status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata)); |
| 72 | if (status != 0) { |
| 73 | /* booting FPGA failed */ |
| 74 | #ifndef FPGA_DEBUG |
| 75 | /* set up serial port with default baudrate */ |
| 76 | (void) get_clocks (); |
| 77 | gd->baudrate = CONFIG_BAUDRATE; |
| 78 | serial_init (); |
| 79 | console_init_f (); |
| 80 | #endif |
| 81 | printf ("\nFPGA: Booting failed "); |
| 82 | switch (status) { |
| 83 | case ERROR_FPGA_PRG_INIT_LOW: |
| 84 | printf ("(Timeout: INIT not low after asserting PROGRAM*)\n "); |
| 85 | break; |
| 86 | case ERROR_FPGA_PRG_INIT_HIGH: |
| 87 | printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n "); |
| 88 | break; |
| 89 | case ERROR_FPGA_PRG_DONE: |
| 90 | printf ("(Timeout: DONE not high after programming FPGA)\n "); |
| 91 | break; |
| 92 | } |
| 93 | |
| 94 | /* display infos on fpgaimage */ |
| 95 | index = 15; |
| 96 | for (i = 0; i < 4; i++) { |
| 97 | len = fpgadata[index]; |
| 98 | printf ("FPGA: %s\n", &(fpgadata[index + 1])); |
| 99 | index += len + 3; |
| 100 | } |
| 101 | putc ('\n'); |
| 102 | /* delayed reboot */ |
| 103 | for (i = 20; i > 0; i--) { |
| 104 | printf ("Rebooting in %2d seconds \r", i); |
| 105 | for (index = 0; index < 1000; index++) |
| 106 | udelay (1000); |
| 107 | } |
| 108 | putc ('\n'); |
| 109 | do_reset (NULL, 0, 0, NULL); |
| 110 | } |
| 111 | |
| 112 | /* |
| 113 | * Init FPGA via RESET (read access on CS3) |
| 114 | */ |
Matthias Fuchs | 049216f | 2009-02-20 10:19:18 +0100 | [diff] [blame] | 115 | in_8((void *)0xf0200000); |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 116 | |
| 117 | /* |
| 118 | * IRQ 0-15 405GP internally generated; active high; level sensitive |
| 119 | * IRQ 16 405GP internally generated; active low; level sensitive |
| 120 | * IRQ 17-24 RESERVED |
| 121 | * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive |
| 122 | * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive |
| 123 | * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive |
| 124 | * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive |
| 125 | * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive |
| 126 | * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive |
| 127 | * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive |
| 128 | */ |
Stefan Roese | 952e776 | 2009-09-24 09:55:50 +0200 | [diff] [blame] | 129 | mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
| 130 | mtdcr (UIC0ER, 0x00000000); /* disable all ints */ |
| 131 | mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */ |
| 132 | /* mtdcr(UIC0PR, 0xFFFFFF81); / set int polarities */ |
| 133 | mtdcr (UIC0PR, 0xFFFFFF80); /* set int polarities */ |
| 134 | mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */ |
| 135 | mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */ |
| 136 | mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 137 | |
| 138 | return 0; |
| 139 | } |
| 140 | |
| 141 | |
| 142 | /* ------------------------------------------------------------------------- */ |
| 143 | |
| 144 | /* |
| 145 | * Check Board Identity: |
| 146 | */ |
| 147 | |
| 148 | int checkboard (void) |
| 149 | { |
| 150 | int index; |
| 151 | int len; |
Wolfgang Denk | 77ddac9 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 152 | char str[64]; |
Wolfgang Denk | cdb7497 | 2010-07-24 21:55:43 +0200 | [diff] [blame] | 153 | int i = getenv_f("serial#", str, sizeof (str)); |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 154 | |
| 155 | puts ("Board: "); |
| 156 | |
stroese | 20aacbf | 2004-12-16 18:35:14 +0000 | [diff] [blame] | 157 | if (i == -1) { |
| 158 | puts ("### No HW ID - assuming AR405"); |
| 159 | } else { |
| 160 | puts(str); |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 161 | } |
| 162 | |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 163 | puts ("\nFPGA: "); |
| 164 | |
| 165 | /* display infos on fpgaimage */ |
| 166 | index = 15; |
| 167 | for (i = 0; i < 4; i++) { |
| 168 | len = fpgadata[index]; |
| 169 | printf ("%s ", &(fpgadata[index + 1])); |
| 170 | index += len + 3; |
| 171 | } |
| 172 | |
| 173 | putc ('\n'); |
| 174 | |
stroese | 20aacbf | 2004-12-16 18:35:14 +0000 | [diff] [blame] | 175 | /* |
| 176 | * Disable sleep mode in LXT971 |
| 177 | */ |
| 178 | lxt971_no_sleep(); |
| 179 | |
wdenk | 37bd321 | 2002-11-03 11:21:28 +0000 | [diff] [blame] | 180 | return 0; |
| 181 | } |