Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | / { |
| 4 | model = "sandbox"; |
| 5 | compatible = "sandbox"; |
| 6 | #address-cells = <1>; |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 7 | #size-cells = <1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 8 | |
Simon Glass | 00606d7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 9 | aliases { |
| 10 | console = &uart0; |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 11 | eth0 = "/eth@10002000"; |
Bin Meng | 71d7971 | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 12 | eth3 = ð_3; |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 13 | eth5 = ð_5; |
Simon Glass | 9cc36a2 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 14 | i2c0 = "/i2c@0"; |
Simon Glass | e48eeb9 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 15 | mmc0 = "/mmc0"; |
| 16 | mmc1 = "/mmc1"; |
Bin Meng | dee4d75 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 17 | pci0 = &pci0; |
| 18 | pci1 = &pci1; |
Nishanth Menon | 5215940 | 2015-09-17 15:42:41 -0500 | [diff] [blame] | 19 | remoteproc1 = &rproc_1; |
| 20 | remoteproc2 = &rproc_2; |
Simon Glass | 52d3bc5 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 21 | rtc0 = &rtc_0; |
| 22 | rtc1 = &rtc_1; |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 23 | spi0 = "/spi@0"; |
Przemyslaw Marczak | f64000c | 2015-05-13 13:38:34 +0200 | [diff] [blame] | 24 | testfdt6 = "/e-test"; |
Simon Glass | 9cc36a2 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 25 | testbus3 = "/some-bus"; |
| 26 | testfdt0 = "/some-bus/c-test@0"; |
| 27 | testfdt1 = "/some-bus/c-test@1"; |
| 28 | testfdt3 = "/b-test"; |
| 29 | testfdt5 = "/some-bus/c-test@5"; |
| 30 | testfdt8 = "/a-test"; |
Eugeniu Rosca | 507cef3 | 2018-05-19 14:13:55 +0200 | [diff] [blame] | 31 | fdt-dummy0 = "/translation-test@8000/dev@0,0"; |
| 32 | fdt-dummy1 = "/translation-test@8000/dev@1,100"; |
| 33 | fdt-dummy2 = "/translation-test@8000/dev@2,200"; |
| 34 | fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; |
Simon Glass | e00cb22 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 35 | usb0 = &usb_0; |
| 36 | usb1 = &usb_1; |
| 37 | usb2 = &usb_2; |
Simon Glass | 00606d7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 38 | }; |
| 39 | |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 40 | a-test { |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 41 | reg = <0 1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 42 | compatible = "denx,u-boot-fdt-test"; |
Simon Glass | eb9ef5f | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 43 | ping-expect = <0>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 44 | ping-add = <0>; |
Simon Glass | 00606d7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 45 | u-boot,dm-pre-reloc; |
Simon Glass | 3669e0e | 2015-01-05 20:05:29 -0700 | [diff] [blame] | 46 | test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>, |
| 47 | <0>, <&gpio_a 12>; |
| 48 | test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>, |
| 49 | <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>, |
| 50 | <&gpio_b 9 0xc 3 2 1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 51 | }; |
| 52 | |
| 53 | junk { |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 54 | reg = <1 1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 55 | compatible = "not,compatible"; |
| 56 | }; |
| 57 | |
| 58 | no-compatible { |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 59 | reg = <2 1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | b-test { |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 63 | reg = <3 1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 64 | compatible = "denx,u-boot-fdt-test"; |
Simon Glass | eb9ef5f | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 65 | ping-expect = <3>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 66 | ping-add = <3>; |
| 67 | }; |
| 68 | |
Jean-Jacques Hiblot | 86322f5 | 2017-04-24 11:51:28 +0200 | [diff] [blame] | 69 | phy_provider0: gen_phy@0 { |
| 70 | compatible = "sandbox,phy"; |
| 71 | #phy-cells = <1>; |
| 72 | }; |
| 73 | |
| 74 | phy_provider1: gen_phy@1 { |
| 75 | compatible = "sandbox,phy"; |
| 76 | #phy-cells = <0>; |
| 77 | broken; |
| 78 | }; |
| 79 | |
| 80 | gen_phy_user: gen_phy_user { |
| 81 | compatible = "simple-bus"; |
| 82 | phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; |
| 83 | phy-names = "phy1", "phy2", "phy3"; |
| 84 | }; |
| 85 | |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 86 | some-bus { |
| 87 | #address-cells = <1>; |
| 88 | #size-cells = <0>; |
Simon Glass | 1ca7e20 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 89 | compatible = "denx,u-boot-test-bus"; |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 90 | reg = <3 1>; |
Simon Glass | eb9ef5f | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 91 | ping-expect = <4>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 92 | ping-add = <4>; |
Simon Glass | 1ca7e20 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 93 | c-test@5 { |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 94 | compatible = "denx,u-boot-fdt-test"; |
| 95 | reg = <5>; |
Simon Glass | 1ca7e20 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 96 | ping-expect = <5>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 97 | ping-add = <5>; |
| 98 | }; |
Simon Glass | 1ca7e20 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 99 | c-test@0 { |
| 100 | compatible = "denx,u-boot-fdt-test"; |
| 101 | reg = <0>; |
| 102 | ping-expect = <6>; |
| 103 | ping-add = <6>; |
| 104 | }; |
| 105 | c-test@1 { |
| 106 | compatible = "denx,u-boot-fdt-test"; |
| 107 | reg = <1>; |
| 108 | ping-expect = <7>; |
| 109 | ping-add = <7>; |
| 110 | }; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 111 | }; |
| 112 | |
| 113 | d-test { |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 114 | reg = <3 1>; |
Simon Glass | 5a66a8f | 2014-07-23 06:55:12 -0600 | [diff] [blame] | 115 | ping-expect = <6>; |
| 116 | ping-add = <6>; |
| 117 | compatible = "google,another-fdt-test"; |
| 118 | }; |
| 119 | |
| 120 | e-test { |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 121 | reg = <3 1>; |
Simon Glass | eb9ef5f | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 122 | ping-expect = <6>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 123 | ping-add = <6>; |
| 124 | compatible = "google,another-fdt-test"; |
| 125 | }; |
| 126 | |
Simon Glass | 9cc36a2 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 127 | f-test { |
| 128 | compatible = "denx,u-boot-fdt-test"; |
| 129 | }; |
| 130 | |
| 131 | g-test { |
| 132 | compatible = "denx,u-boot-fdt-test"; |
| 133 | }; |
| 134 | |
Patrice Chotard | ee87a09 | 2017-09-04 14:55:57 +0200 | [diff] [blame] | 135 | clocks { |
| 136 | clk_fixed: clk-fixed { |
| 137 | compatible = "fixed-clock"; |
| 138 | #clock-cells = <0>; |
| 139 | clock-frequency = <1234>; |
| 140 | }; |
Stephen Warren | 135aa95 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 141 | }; |
| 142 | |
| 143 | clk_sandbox: clk-sbox { |
Simon Glass | 6a1c7ce | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 144 | compatible = "sandbox,clk"; |
Stephen Warren | 135aa95 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 145 | #clock-cells = <1>; |
| 146 | }; |
| 147 | |
| 148 | clk-test { |
| 149 | compatible = "sandbox,clk-test"; |
| 150 | clocks = <&clk_fixed>, |
| 151 | <&clk_sandbox 1>, |
| 152 | <&clk_sandbox 0>; |
| 153 | clock-names = "fixed", "i2c", "spi"; |
Simon Glass | 6a1c7ce | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 154 | }; |
| 155 | |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 156 | eth@10002000 { |
| 157 | compatible = "sandbox,eth"; |
| 158 | reg = <0x10002000 0x1000>; |
Joe Hershberger | c6fa51a | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 159 | fake-host-hwaddr = [00 00 66 44 22 00]; |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 160 | }; |
| 161 | |
| 162 | eth_5: eth@10003000 { |
| 163 | compatible = "sandbox,eth"; |
| 164 | reg = <0x10003000 0x1000>; |
Joe Hershberger | c6fa51a | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 165 | fake-host-hwaddr = [00 00 66 44 22 11]; |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 166 | }; |
| 167 | |
Bin Meng | 71d7971 | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 168 | eth_3: sbe5 { |
| 169 | compatible = "sandbox,eth"; |
| 170 | reg = <0x10005000 0x1000>; |
Joe Hershberger | c6fa51a | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 171 | fake-host-hwaddr = [00 00 66 44 22 33]; |
Bin Meng | 71d7971 | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 172 | }; |
| 173 | |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 174 | eth@10004000 { |
| 175 | compatible = "sandbox,eth"; |
| 176 | reg = <0x10004000 0x1000>; |
Joe Hershberger | c6fa51a | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 177 | fake-host-hwaddr = [00 00 66 44 22 22]; |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 178 | }; |
| 179 | |
Simon Glass | 0ae0cb7 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 180 | gpio_a: base-gpios { |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 181 | compatible = "sandbox,gpio"; |
Simon Glass | 3669e0e | 2015-01-05 20:05:29 -0700 | [diff] [blame] | 182 | gpio-controller; |
| 183 | #gpio-cells = <1>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 184 | gpio-bank-name = "a"; |
Simon Glass | 995b60b | 2018-02-03 10:36:59 -0700 | [diff] [blame] | 185 | sandbox,gpio-count = <20>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 186 | }; |
| 187 | |
Simon Glass | 3669e0e | 2015-01-05 20:05:29 -0700 | [diff] [blame] | 188 | gpio_b: extra-gpios { |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 189 | compatible = "sandbox,gpio"; |
Simon Glass | 3669e0e | 2015-01-05 20:05:29 -0700 | [diff] [blame] | 190 | gpio-controller; |
| 191 | #gpio-cells = <5>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 192 | gpio-bank-name = "b"; |
Simon Glass | 995b60b | 2018-02-03 10:36:59 -0700 | [diff] [blame] | 193 | sandbox,gpio-count = <10>; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 194 | }; |
Simon Glass | 0ae0cb7 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 195 | |
Simon Glass | ecc2ed5 | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 196 | i2c@0 { |
| 197 | #address-cells = <1>; |
| 198 | #size-cells = <0>; |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 199 | reg = <0 1>; |
Simon Glass | ecc2ed5 | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 200 | compatible = "sandbox,i2c"; |
| 201 | clock-frequency = <100000>; |
| 202 | eeprom@2c { |
| 203 | reg = <0x2c>; |
| 204 | compatible = "i2c-eeprom"; |
| 205 | emul { |
| 206 | compatible = "sandbox,i2c-eeprom"; |
| 207 | sandbox,filename = "i2c.bin"; |
| 208 | sandbox,size = <256>; |
| 209 | }; |
| 210 | }; |
Przemyslaw Marczak | 9038cd5 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 211 | |
Simon Glass | 52d3bc5 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 212 | rtc_0: rtc@43 { |
| 213 | reg = <0x43>; |
| 214 | compatible = "sandbox-rtc"; |
| 215 | emul { |
| 216 | compatible = "sandbox,i2c-rtc"; |
| 217 | }; |
| 218 | }; |
| 219 | |
| 220 | rtc_1: rtc@61 { |
| 221 | reg = <0x61>; |
| 222 | compatible = "sandbox-rtc"; |
| 223 | emul { |
| 224 | compatible = "sandbox,i2c-rtc"; |
| 225 | }; |
| 226 | }; |
| 227 | |
Przemyslaw Marczak | 9038cd5 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 228 | sandbox_pmic: sandbox_pmic { |
| 229 | reg = <0x40>; |
| 230 | }; |
Lukasz Majewski | 686df49 | 2018-05-15 16:26:40 +0200 | [diff] [blame] | 231 | |
| 232 | mc34708: pmic@41 { |
| 233 | reg = <0x41>; |
| 234 | }; |
Simon Glass | ecc2ed5 | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 235 | }; |
| 236 | |
Przemyslaw Marczak | 08d6300 | 2015-10-27 13:08:06 +0100 | [diff] [blame] | 237 | adc@0 { |
| 238 | compatible = "sandbox,adc"; |
| 239 | vdd-supply = <&buck2>; |
| 240 | vss-microvolts = <0>; |
| 241 | }; |
| 242 | |
Simon Glass | 3c97c4f | 2016-01-18 19:52:26 -0700 | [diff] [blame] | 243 | lcd { |
| 244 | u-boot,dm-pre-reloc; |
| 245 | compatible = "sandbox,lcd-sdl"; |
| 246 | xres = <1366>; |
| 247 | yres = <768>; |
| 248 | }; |
| 249 | |
Simon Glass | 3c43fba | 2015-07-06 12:54:34 -0600 | [diff] [blame] | 250 | leds { |
| 251 | compatible = "gpio-leds"; |
| 252 | |
| 253 | iracibble { |
| 254 | gpios = <&gpio_a 1 0>; |
| 255 | label = "sandbox:red"; |
| 256 | }; |
| 257 | |
| 258 | martinet { |
| 259 | gpios = <&gpio_a 2 0>; |
| 260 | label = "sandbox:green"; |
| 261 | }; |
Patrick Bruenn | 274fb46 | 2018-04-11 11:16:29 +0200 | [diff] [blame] | 262 | |
| 263 | default_on { |
| 264 | gpios = <&gpio_a 5 0>; |
| 265 | label = "sandbox:default_on"; |
| 266 | default-state = "on"; |
| 267 | }; |
| 268 | |
| 269 | default_off { |
| 270 | gpios = <&gpio_a 6 0>; |
| 271 | label = "sandbox:default_off"; |
| 272 | default-state = "off"; |
| 273 | }; |
Simon Glass | 3c43fba | 2015-07-06 12:54:34 -0600 | [diff] [blame] | 274 | }; |
| 275 | |
Stephen Warren | 8961b52 | 2016-05-16 17:41:37 -0600 | [diff] [blame] | 276 | mbox: mbox { |
| 277 | compatible = "sandbox,mbox"; |
| 278 | #mbox-cells = <1>; |
| 279 | }; |
| 280 | |
| 281 | mbox-test { |
| 282 | compatible = "sandbox,mbox-test"; |
| 283 | mboxes = <&mbox 100>, <&mbox 1>; |
| 284 | mbox-names = "other", "test"; |
| 285 | }; |
| 286 | |
Simon Glass | e48eeb9 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 287 | mmc2 { |
| 288 | compatible = "sandbox,mmc"; |
| 289 | }; |
| 290 | |
| 291 | mmc1 { |
| 292 | compatible = "sandbox,mmc"; |
| 293 | }; |
| 294 | |
| 295 | mmc0 { |
Simon Glass | 8e6cc46 | 2015-07-06 12:54:32 -0600 | [diff] [blame] | 296 | compatible = "sandbox,mmc"; |
| 297 | }; |
| 298 | |
Bin Meng | dee4d75 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 299 | pci0: pci-controller0 { |
Simon Glass | d3b7ff1 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 300 | compatible = "sandbox,pci"; |
| 301 | device_type = "pci"; |
| 302 | #address-cells = <3>; |
| 303 | #size-cells = <2>; |
| 304 | ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 |
| 305 | 0x01000000 0 0x20000000 0x20000000 0 0x2000>; |
Bin Meng | 2db7f2b | 2018-08-03 01:14:39 -0700 | [diff] [blame] | 306 | pci@0,0 { |
| 307 | compatible = "pci-generic"; |
| 308 | reg = <0x0000 0 0 0 0>; |
| 309 | emul@0,0 { |
| 310 | compatible = "sandbox,swap-case"; |
| 311 | }; |
| 312 | }; |
Simon Glass | d3b7ff1 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 313 | pci@1f,0 { |
| 314 | compatible = "pci-generic"; |
| 315 | reg = <0xf800 0 0 0 0>; |
| 316 | emul@1f,0 { |
| 317 | compatible = "sandbox,swap-case"; |
| 318 | }; |
| 319 | }; |
| 320 | }; |
| 321 | |
Bin Meng | dee4d75 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 322 | pci1: pci-controller1 { |
| 323 | compatible = "sandbox,pci"; |
| 324 | device_type = "pci"; |
| 325 | #address-cells = <3>; |
| 326 | #size-cells = <2>; |
| 327 | ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 |
| 328 | 0x01000000 0 0x40000000 0x40000000 0 0x2000>; |
Bin Meng | 490d13a | 2018-08-03 01:14:47 -0700 | [diff] [blame^] | 329 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678 |
| 330 | 0x0c 0x00 0x1234 0x5678>; |
Bin Meng | dee4d75 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 331 | }; |
| 332 | |
Simon Glass | 9856157 | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 333 | probing { |
| 334 | compatible = "simple-bus"; |
| 335 | test1 { |
| 336 | compatible = "denx,u-boot-probe-test"; |
| 337 | }; |
| 338 | |
| 339 | test2 { |
| 340 | compatible = "denx,u-boot-probe-test"; |
| 341 | }; |
| 342 | |
| 343 | test3 { |
| 344 | compatible = "denx,u-boot-probe-test"; |
| 345 | }; |
| 346 | |
| 347 | test4 { |
| 348 | compatible = "denx,u-boot-probe-test"; |
| 349 | }; |
| 350 | }; |
| 351 | |
Stephen Warren | 61f5ddc | 2016-07-13 13:45:31 -0600 | [diff] [blame] | 352 | pwrdom: power-domain { |
| 353 | compatible = "sandbox,power-domain"; |
| 354 | #power-domain-cells = <1>; |
| 355 | }; |
| 356 | |
| 357 | power-domain-test { |
| 358 | compatible = "sandbox,power-domain-test"; |
| 359 | power-domains = <&pwrdom 2>; |
| 360 | }; |
| 361 | |
Simon Glass | 43b4156 | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 362 | pwm { |
| 363 | compatible = "sandbox,pwm"; |
| 364 | }; |
| 365 | |
| 366 | pwm2 { |
| 367 | compatible = "sandbox,pwm"; |
| 368 | }; |
| 369 | |
Simon Glass | 64ce0ca | 2015-07-06 12:54:31 -0600 | [diff] [blame] | 370 | ram { |
| 371 | compatible = "sandbox,ram"; |
| 372 | }; |
| 373 | |
Simon Glass | 5010d98 | 2015-07-06 12:54:29 -0600 | [diff] [blame] | 374 | reset@0 { |
| 375 | compatible = "sandbox,warm-reset"; |
| 376 | }; |
| 377 | |
| 378 | reset@1 { |
| 379 | compatible = "sandbox,reset"; |
| 380 | }; |
| 381 | |
Stephen Warren | 4581b71 | 2016-06-17 09:43:59 -0600 | [diff] [blame] | 382 | resetc: reset-ctl { |
| 383 | compatible = "sandbox,reset-ctl"; |
| 384 | #reset-cells = <1>; |
| 385 | }; |
| 386 | |
| 387 | reset-ctl-test { |
| 388 | compatible = "sandbox,reset-ctl-test"; |
| 389 | resets = <&resetc 100>, <&resetc 2>; |
| 390 | reset-names = "other", "test"; |
| 391 | }; |
| 392 | |
Nishanth Menon | 5215940 | 2015-09-17 15:42:41 -0500 | [diff] [blame] | 393 | rproc_1: rproc@1 { |
| 394 | compatible = "sandbox,test-processor"; |
| 395 | remoteproc-name = "remoteproc-test-dev1"; |
| 396 | }; |
| 397 | |
| 398 | rproc_2: rproc@2 { |
| 399 | compatible = "sandbox,test-processor"; |
| 400 | internal-memory-mapped; |
| 401 | remoteproc-name = "remoteproc-test-dev2"; |
| 402 | }; |
| 403 | |
Ramon Fried | 7fd7e2c | 2018-07-02 02:57:59 +0300 | [diff] [blame] | 404 | smem@0 { |
| 405 | compatible = "sandbox,smem"; |
| 406 | }; |
| 407 | |
Simon Glass | 0ae0cb7 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 408 | spi@0 { |
| 409 | #address-cells = <1>; |
| 410 | #size-cells = <0>; |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 411 | reg = <0 1>; |
Simon Glass | 0ae0cb7 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 412 | compatible = "sandbox,spi"; |
| 413 | cs-gpios = <0>, <&gpio_a 0>; |
| 414 | spi.bin@0 { |
| 415 | reg = <0>; |
| 416 | compatible = "spansion,m25p16", "spi-flash"; |
| 417 | spi-max-frequency = <40000000>; |
| 418 | sandbox,filename = "spi.bin"; |
| 419 | }; |
| 420 | }; |
| 421 | |
Simon Glass | 04035fd | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 422 | syscon@0 { |
| 423 | compatible = "sandbox,syscon0"; |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 424 | reg = <0x10 4>; |
Simon Glass | 04035fd | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 425 | }; |
| 426 | |
| 427 | syscon@1 { |
| 428 | compatible = "sandbox,syscon1"; |
Simon Glass | 0503e82 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 429 | reg = <0x20 5 |
| 430 | 0x28 6 |
| 431 | 0x30 7 |
| 432 | 0x38 8>; |
Simon Glass | 04035fd | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 433 | }; |
| 434 | |
Masahiro Yamada | 99552c3 | 2018-04-23 13:26:53 +0900 | [diff] [blame] | 435 | syscon@2 { |
| 436 | compatible = "simple-mfd", "syscon"; |
| 437 | reg = <0x40 5 |
| 438 | 0x48 6 |
| 439 | 0x50 7 |
| 440 | 0x58 8>; |
| 441 | }; |
| 442 | |
Thomas Chou | e7cc8d1 | 2015-12-11 16:27:34 +0800 | [diff] [blame] | 443 | timer { |
| 444 | compatible = "sandbox,timer"; |
| 445 | clock-frequency = <1000000>; |
| 446 | }; |
| 447 | |
Miquel Raynal | b91ad16 | 2018-05-15 11:57:27 +0200 | [diff] [blame] | 448 | tpm2 { |
| 449 | compatible = "sandbox,tpm2"; |
| 450 | }; |
| 451 | |
Simon Glass | 171e991 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 452 | uart0: serial { |
| 453 | compatible = "sandbox,serial"; |
| 454 | u-boot,dm-pre-reloc; |
Joe Hershberger | bfacad7 | 2015-03-22 17:09:15 -0500 | [diff] [blame] | 455 | }; |
| 456 | |
Simon Glass | e00cb22 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 457 | usb_0: usb@0 { |
| 458 | compatible = "sandbox,usb"; |
| 459 | status = "disabled"; |
| 460 | hub { |
| 461 | compatible = "sandbox,usb-hub"; |
| 462 | #address-cells = <1>; |
| 463 | #size-cells = <0>; |
| 464 | flash-stick { |
| 465 | reg = <0>; |
| 466 | compatible = "sandbox,usb-flash"; |
| 467 | }; |
| 468 | }; |
| 469 | }; |
| 470 | |
| 471 | usb_1: usb@1 { |
| 472 | compatible = "sandbox,usb"; |
| 473 | hub { |
| 474 | compatible = "usb-hub"; |
| 475 | usb,device-class = <9>; |
| 476 | hub-emul { |
| 477 | compatible = "sandbox,usb-hub"; |
| 478 | #address-cells = <1>; |
| 479 | #size-cells = <0>; |
Simon Glass | 431cbd6 | 2015-11-08 23:48:01 -0700 | [diff] [blame] | 480 | flash-stick@0 { |
Simon Glass | e00cb22 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 481 | reg = <0>; |
| 482 | compatible = "sandbox,usb-flash"; |
| 483 | sandbox,filepath = "testflash.bin"; |
| 484 | }; |
| 485 | |
Simon Glass | 431cbd6 | 2015-11-08 23:48:01 -0700 | [diff] [blame] | 486 | flash-stick@1 { |
| 487 | reg = <1>; |
| 488 | compatible = "sandbox,usb-flash"; |
| 489 | sandbox,filepath = "testflash1.bin"; |
| 490 | }; |
| 491 | |
| 492 | flash-stick@2 { |
| 493 | reg = <2>; |
| 494 | compatible = "sandbox,usb-flash"; |
| 495 | sandbox,filepath = "testflash2.bin"; |
| 496 | }; |
| 497 | |
Simon Glass | bff1a71 | 2015-11-08 23:48:08 -0700 | [diff] [blame] | 498 | keyb@3 { |
| 499 | reg = <3>; |
| 500 | compatible = "sandbox,usb-keyb"; |
| 501 | }; |
| 502 | |
Simon Glass | e00cb22 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 503 | }; |
| 504 | }; |
| 505 | }; |
| 506 | |
| 507 | usb_2: usb@2 { |
| 508 | compatible = "sandbox,usb"; |
| 509 | status = "disabled"; |
| 510 | }; |
| 511 | |
Mateusz Kulikowski | d33776e | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 512 | spmi: spmi@0 { |
| 513 | compatible = "sandbox,spmi"; |
| 514 | #address-cells = <0x1>; |
| 515 | #size-cells = <0x1>; |
| 516 | pm8916@0 { |
| 517 | compatible = "qcom,spmi-pmic"; |
| 518 | reg = <0x0 0x1>; |
| 519 | #address-cells = <0x1>; |
| 520 | #size-cells = <0x1>; |
| 521 | |
| 522 | spmi_gpios: gpios@c000 { |
| 523 | compatible = "qcom,pm8916-gpio"; |
| 524 | reg = <0xc000 0x400>; |
| 525 | gpio-controller; |
| 526 | gpio-count = <4>; |
| 527 | #gpio-cells = <2>; |
| 528 | gpio-bank-name="spmi"; |
| 529 | }; |
| 530 | }; |
| 531 | }; |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 532 | |
| 533 | wdt0: wdt@0 { |
| 534 | compatible = "sandbox,wdt"; |
| 535 | }; |
Rob Clark | f200680 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 536 | |
| 537 | chosen { |
Simon Glass | 7e87816 | 2018-02-03 10:36:58 -0700 | [diff] [blame] | 538 | #address-cells = <1>; |
| 539 | #size-cells = <1>; |
Rob Clark | f200680 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 540 | chosen-test { |
| 541 | compatible = "denx,u-boot-fdt-test"; |
| 542 | reg = <9 1>; |
| 543 | }; |
| 544 | }; |
Mario Six | e8d5291 | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 545 | |
| 546 | translation-test@8000 { |
| 547 | compatible = "simple-bus"; |
| 548 | reg = <0x8000 0x4000>; |
| 549 | |
| 550 | #address-cells = <0x2>; |
| 551 | #size-cells = <0x1>; |
| 552 | |
| 553 | ranges = <0 0x0 0x8000 0x1000 |
| 554 | 1 0x100 0x9000 0x1000 |
| 555 | 2 0x200 0xA000 0x1000 |
| 556 | 3 0x300 0xB000 0x1000 |
| 557 | >; |
| 558 | |
| 559 | dev@0,0 { |
| 560 | compatible = "denx,u-boot-fdt-dummy"; |
| 561 | reg = <0 0x0 0x1000>; |
| 562 | }; |
| 563 | |
| 564 | dev@1,100 { |
| 565 | compatible = "denx,u-boot-fdt-dummy"; |
| 566 | reg = <1 0x100 0x1000>; |
| 567 | |
| 568 | }; |
| 569 | |
| 570 | dev@2,200 { |
| 571 | compatible = "denx,u-boot-fdt-dummy"; |
| 572 | reg = <2 0x200 0x1000>; |
| 573 | }; |
| 574 | |
| 575 | |
| 576 | noxlatebus@3,300 { |
| 577 | compatible = "simple-bus"; |
| 578 | reg = <3 0x300 0x1000>; |
| 579 | |
| 580 | #address-cells = <0x1>; |
| 581 | #size-cells = <0x0>; |
| 582 | |
| 583 | dev@42 { |
| 584 | compatible = "denx,u-boot-fdt-dummy"; |
| 585 | reg = <0x42>; |
| 586 | }; |
| 587 | }; |
| 588 | }; |
Simon Glass | 2e7d35d | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 589 | }; |
Przemyslaw Marczak | 9038cd5 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 590 | |
| 591 | #include "sandbox_pmic.dtsi" |