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gerrit.cesnet.cz / github / trini / u-boot / 48f6232e5897ff1002f2a5a929425da1968ac487 / . / configs / chromebook_jerry_defconfig
blob: cdeabaa12aa649bb83257f9acaa1fee8a3f983d5 [file] [log] [blame]
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4CONFIG_ROCKCHIP_RK3288=y
Tom Rini8728c972017-03-13 13:48:42 -0400[diff] [blame]5# CONFIG_SPL_MMC_SUPPORT is not set
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]6CONFIG_TARGET_CHROMEBOOK_JERRY=y
Simon Glasse404ade2016-09-12 23:18:57 -0600[diff] [blame]7CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassf35ed9e2016-09-12 23:18:58 -0600[diff] [blame]8CONFIG_SPL_SPI_SUPPORT=y
Thomas Choue4aa8ed2015-11-11 21:39:33 +0800[diff] [blame]9CONFIG_SPL_STACK_R_ADDR=0x80000
Simon Glass5e9b1502016-11-13 14:22:10 -0700[diff] [blame]10CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
Tom Rinifb82fe32017-06-19 09:47:40 -0400[diff] [blame]11CONFIG_DEBUG_UART=y
Tom Rini48f62322017-08-25 17:50:27 -0400[diff] [blame^]12# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass98af8792016-10-17 20:12:35 -0600[diff] [blame]13CONFIG_SILENT_CONSOLE=y
Simon Glassef26d602016-10-17 20:12:37 -0600[diff] [blame]14# CONFIG_DISPLAY_CPUINFO is not set
Simon Glassfe974712017-05-31 17:57:33 -0600[diff] [blame]15CONFIG_BOARD_EARLY_INIT_F=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]16CONFIG_SPL_STACK_R=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]17CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Tom Rini48f62322017-08-25 17:50:27 -0400[diff] [blame^]18CONFIG_FASTBOOT_FLASH=y
19CONFIG_FASTBOOT_FLASH_MMC_DEV=0
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]20# CONFIG_CMD_IMLS is not set
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]21CONFIG_CMD_GPIO=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]22CONFIG_CMD_GPT=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]23CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]24CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]25CONFIG_CMD_SF=y
Simon Glass719d36e2017-08-04 16:34:46 -0600[diff] [blame]26CONFIG_CMD_SF_TEST=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]27CONFIG_CMD_SPI=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]28# CONFIG_CMD_SETEXPR is not set
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_CACHE=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]30CONFIG_CMD_TIME=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]31CONFIG_CMD_PMIC=y
32CONFIG_CMD_REGULATOR=y
Patrick Delaunayb0cf7332017-01-27 11:00:37 +0100[diff] [blame]33# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay1acc0082017-01-27 11:00:38 +0100[diff] [blame]34# CONFIG_SPL_ISO_PARTITION is not set
Patrick Delaunaybd42a942017-01-27 11:00:41 +0100[diff] [blame]35# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]36CONFIG_SPL_PARTITION_UUIDS=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]37CONFIG_SPL_OF_CONTROL=y
Simon Glass57db8c62016-11-13 14:22:09 -0700[diff] [blame]38CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Masahiro Yamada18780952016-12-07 22:10:25 +0900[diff] [blame]39CONFIG_SPL_OF_PLATDATA=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]40CONFIG_REGMAP=y
huang lin41c7f662015-11-17 14:20:13 +0800[diff] [blame]41CONFIG_SPL_REGMAP=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]42CONFIG_SYSCON=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]43CONFIG_SPL_SYSCON=y
Simon Glass79918092016-01-21 19:43:49 -0700[diff] [blame]44# CONFIG_SPL_SIMPLE_BUS is not set
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]45CONFIG_CLK=y
46CONFIG_SPL_CLK=y
47CONFIG_ROCKCHIP_GPIO=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]48CONFIG_I2C_CROS_EC_TUNNEL=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]49CONFIG_SYS_I2C_ROCKCHIP=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]50CONFIG_I2C_MUX=y
Simon Glassef26d602016-10-17 20:12:37 -0600[diff] [blame]51CONFIG_DM_KEYBOARD=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]52CONFIG_CROS_EC_KEYB=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]53CONFIG_CROS_EC=y
54CONFIG_CROS_EC_SPI=y
Simon Glass79d020e2016-01-21 19:43:36 -0700[diff] [blame]55CONFIG_PWRSEQ=y
Masahiro Yamada55ed3b42017-01-10 13:32:04 +0900[diff] [blame]56CONFIG_MMC_DW=y
Masahiro Yamadafed44082017-01-10 13:32:03 +0900[diff] [blame]57CONFIG_MMC_DW_ROCKCHIP=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]58CONFIG_PINCTRL=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]59CONFIG_SPL_PINCTRL=y
Simon Glassdd8e4292015-12-29 05:22:45 -0700[diff] [blame]60# CONFIG_SPL_PINCTRL_FULL is not set
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]61CONFIG_PINCTRL_ROCKCHIP_RK3288=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]62CONFIG_DM_PMIC=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]63# CONFIG_SPL_PMIC_CHILDREN is not set
Jacob Chen453c5a92017-05-02 14:54:52 +0800[diff] [blame]64CONFIG_PMIC_RK8XX=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]65CONFIG_DM_REGULATOR_FIXED=y
Jacob Chen453c5a92017-05-02 14:54:52 +0800[diff] [blame]66CONFIG_REGULATOR_RK8XX=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]67CONFIG_PWM_ROCKCHIP=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]68CONFIG_RAM=y
69CONFIG_SPL_RAM=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]70CONFIG_DEBUG_UART_BASE=0xff690000
71CONFIG_DEBUG_UART_CLOCK=24000000
72CONFIG_DEBUG_UART_SHIFT=2
Thomas Chou9e390032015-11-19 21:48:14 +0800[diff] [blame]73CONFIG_SYS_NS16550=y
Simon Glass57db8c62016-11-13 14:22:09 -0700[diff] [blame]74CONFIG_ROCKCHIP_SERIAL=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]75CONFIG_ROCKCHIP_SPI=y
Tom Riniaca5cd22016-09-08 16:11:59 -0400[diff] [blame]76CONFIG_SYSRESET=y
Tom Riniecad7052017-08-25 17:50:26 -0400[diff] [blame]77CONFIG_USB=y
78CONFIG_USB_GADGET=y
79CONFIG_USB_GADGET_DWC2_OTG=y
80CONFIG_USB_GADGET_DOWNLOAD=y
81CONFIG_G_DNL_MANUFACTURER="Rockchip"
82CONFIG_G_DNL_VENDOR_NUM=0x2207
83CONFIG_G_DNL_PRODUCT_NUM=0x320a
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]84CONFIG_DM_VIDEO=y
Anatolij Gustschin7588c312016-01-25 17:17:22 +0100[diff] [blame]85CONFIG_DISPLAY=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]86CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.comb98f0a32017-04-17 22:24:23 +0800[diff] [blame]87CONFIG_DISPLAY_ROCKCHIP_EDP=y
88CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Simon Glassdd8e4292015-12-29 05:22:45 -0700[diff] [blame]89CONFIG_USE_TINY_PRINTF=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]90CONFIG_CMD_DHRYSTONE=y
91CONFIG_ERRNO_STR=y
Simon Glass57db8c62016-11-13 14:22:09 -0700[diff] [blame]92# CONFIG_SPL_OF_LIBFDT is not set