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wdenk5b1d7132002-11-03 00:07:02 +00001/*
2 * (C) Copyright 2000 - 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denkf08abe32005-11-25 16:38:03 +01006 ********************************************************************
7 * NOTE: This header file defines an interface to U-Boot. Including
8 * this (unmodified) header file in another file is considered normal
9 * use of U-Boot, and does *not* fall under the heading of "derived
10 * work".
11 ********************************************************************
wdenk5b1d7132002-11-03 00:07:02 +000012 */
13
14#ifndef __U_BOOT_H__
15#define __U_BOOT_H__
16
17/*
18 * Board information passed to Linux kernel from U-Boot
19 *
20 * include/asm-ppc/u-boot.h
21 */
22
Simon Glass660c60c2013-03-11 06:50:01 +000023#ifdef CONFIG_SYS_GENERIC_BOARD
24/* Use the generic board which requires a unified bd_info */
25#include <asm-generic/u-boot.h>
26#else
27
wdenk5b1d7132002-11-03 00:07:02 +000028#ifndef __ASSEMBLY__
wdenk5b1d7132002-11-03 00:07:02 +000029
30typedef struct bd_info {
31 unsigned long bi_memstart; /* start of DRAM memory */
Becky Bruceb57ca3e2008-06-09 20:37:16 -050032 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
wdenk5b1d7132002-11-03 00:07:02 +000033 unsigned long bi_flashstart; /* start of FLASH memory */
34 unsigned long bi_flashsize; /* size of FLASH memory */
35 unsigned long bi_flashoffset; /* reserved area for startup monitor */
36 unsigned long bi_sramstart; /* start of SRAM memory */
37 unsigned long bi_sramsize; /* size of SRAM memory */
Masahiro Yamada58dac322014-03-05 17:40:10 +090038#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \
Jon Loeligerdebb7352006-04-26 17:58:56 -050039 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
wdenk5b1d7132002-11-03 00:07:02 +000040 unsigned long bi_immr_base; /* base of IMMR register */
41#endif
wdenkcbd8a352004-02-24 02:00:03 +000042#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +000043 unsigned long bi_mbar_base; /* base of internal registers */
44#endif
Peter Tyser0f898602009-05-22 17:23:24 -050045#if defined(CONFIG_MPC83xx)
Eran Libertyf046ccd2005-07-28 10:08:46 -050046 unsigned long bi_immrbar;
47#endif
Peter Tyserd98b0522010-10-14 23:33:24 -050048 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
Anatolij Gustschine5ab7022012-09-02 09:09:00 +000049 unsigned long bi_ip_addr; /* IP Address */
Mike Frysingereb85aa52009-02-11 20:07:19 -050050 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
wdenk5b1d7132002-11-03 00:07:02 +000051 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
52 unsigned long bi_intfreq; /* Internal Freq, in MHz */
53 unsigned long bi_busfreq; /* Bus Freq, in MHz */
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050054#if defined(CONFIG_CPM2)
wdenk5b1d7132002-11-03 00:07:02 +000055 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
56 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
57 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
58 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
59#endif
Grzegorz Bernacki281ff9a2008-01-08 17:16:15 +010060#if defined(CONFIG_MPC512X)
61 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
62#endif /* CONFIG_MPC512X */
wdenkcbd8a352004-02-24 02:00:03 +000063#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +000064 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
65 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
66#endif
wdenk12f34242003-09-02 22:48:03 +000067#if defined(CONFIG_405) || \
68 defined(CONFIG_405GP) || \
wdenk12f34242003-09-02 22:48:03 +000069 defined(CONFIG_405EP) || \
Stefan Roesee01bd212007-03-21 13:38:59 +010070 defined(CONFIG_405EZ) || \
Stefan Roesedbbd1252007-10-05 17:10:59 +020071 defined(CONFIG_405EX) || \
wdenk12f34242003-09-02 22:48:03 +000072 defined(CONFIG_440)
wdenk5b1d7132002-11-03 00:07:02 +000073 unsigned char bi_s_version[4]; /* Version of this structure */
Wolfgang Denk0c8721a2005-09-23 11:05:55 +020074 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
wdenk5b1d7132002-11-03 00:07:02 +000075 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
76 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
77 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
78 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
79#endif
wdenk03f5c552004-10-10 21:21:55 +000080
wdenke2ffd592004-12-31 09:32:47 +000081#ifdef CONFIG_HAS_ETH1
Mike Frysingereb85aa52009-02-11 20:07:19 -050082 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
wdenk5b1d7132002-11-03 00:07:02 +000083#endif
wdenke2ffd592004-12-31 09:32:47 +000084#ifdef CONFIG_HAS_ETH2
Mike Frysingereb85aa52009-02-11 20:07:19 -050085 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
wdenk5b1d7132002-11-03 00:07:02 +000086#endif
wdenke2ffd592004-12-31 09:32:47 +000087#ifdef CONFIG_HAS_ETH3
Mike Frysingereb85aa52009-02-11 20:07:19 -050088 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
wdenkba56f622004-02-06 23:19:44 +000089#endif
richardretanubunc68a05f2008-09-29 18:28:23 -040090#ifdef CONFIG_HAS_ETH4
Mike Frysingereb85aa52009-02-11 20:07:19 -050091 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
richardretanubunc68a05f2008-09-29 18:28:23 -040092#endif
93#ifdef CONFIG_HAS_ETH5
Mike Frysingereb85aa52009-02-11 20:07:19 -050094 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
richardretanubunc68a05f2008-09-29 18:28:23 -040095#endif
wdenk03f5c552004-10-10 21:21:55 +000096
Stefan Roesee01bd212007-03-21 13:38:59 +010097#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
98 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
Stefan Roese887e2ec2006-09-07 11:51:23 +020099 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
Stefan Roese999ecd52008-03-11 15:07:10 +0100100 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
101 defined(CONFIG_460EX) || defined(CONFIG_460GT)
wdenk5bb226e2003-11-17 21:14:37 +0000102 unsigned int bi_opbfreq; /* OPB clock in Hz */
103 int bi_iic_fast[2]; /* Use fast i2c mode */
104#endif
Stefan Roesed6c61aa2005-08-16 18:18:00 +0200105#if defined(CONFIG_4xx)
Stefan Roese999ecd52008-03-11 15:07:10 +0100106#if defined(CONFIG_440GX) || \
107 defined(CONFIG_460EX) || defined(CONFIG_460GT)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200108 int bi_phynum[4]; /* Determines phy mapping */
109 int bi_phymode[4]; /* Determines phy mode */
Weirich, Bernhard25fb02a2011-09-08 18:27:38 +0200110#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200111 int bi_phynum[2]; /* Determines phy mapping */
112 int bi_phymode[2]; /* Determines phy mode */
Stefan Roesed6c61aa2005-08-16 18:18:00 +0200113#else
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200114 int bi_phynum[1]; /* Determines phy mapping */
115 int bi_phymode[1]; /* Determines phy mode */
wdenk3c74e322004-02-22 23:46:08 +0000116#endif
Stefan Roesed6c61aa2005-08-16 18:18:00 +0200117#endif /* defined(CONFIG_4xx) */
wdenk5b1d7132002-11-03 00:07:02 +0000118} bd_t;
119
120#endif /* __ASSEMBLY__ */
Mike Frysinger476af292011-10-03 14:50:33 +0000121
Simon Glass660c60c2013-03-11 06:50:01 +0000122#endif /* !CONFIG_SYS_GENERIC_BOARD */
123
Mike Frysinger476af292011-10-03 14:50:33 +0000124/* For image.h:image_check_target_arch() */
125#define IH_ARCH_DEFAULT IH_ARCH_PPC
126
wdenk5b1d7132002-11-03 00:07:02 +0000127#endif /* __U_BOOT_H__ */