blob: 0cd6e7faca0d75277c7a6257bc1b9d6ead7b9ee3 [file] [log] [blame]
wdenk48c00102002-10-26 17:39:47 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <gj@denx.de>
6 *
7 * Configuation settings for the SAMSUNG board.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * If we are developing, we might want to start armboot from ram
33 * so we MUST NOT initialize critical regs like mem-timing ...
34 */
35#define CONFIG_INIT_CRITICAL /* undef for developing */
36
37/*
38 * High Level Configuration Options
39 * (easy to change)
40 */
41#define CONFIG_ARM920T 1 /* This is an ARM920T core */
42#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
43#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */
44
45/* input clock of PLL */
46#define CONFIG_PLL_INPUT_FREQ 12000000 /* SMDK2400 has 12 MHz input clock */
47#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
48
49#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50#define CONFIG_SETUP_MEMORY_TAGS 1
51#define CONFIG_INITRD_TAG 1
52
53
54/*
55 * Size of malloc() pool
56 */
57#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
58
59/*
60 * Hardware drivers
61 */
62#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
63#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
64#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
65
66/*
67 * select serial console configuration
68 */
69#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */
70
71#undef CONFIG_HWFLOW /* include RTS/CTS flow control support */
72
73#undef CONFIG_MODEM_SUPPORT /* enable modem initialization stuff */
74
75/*
76 * The following enables modem debugging stuff. The dbg() and
77 * 'char screen[1024]' are used for debug printfs. Unfortunately,
78 * it is usable only from BDI
79 */
80#undef CONFIG_MODEM_SUPPORT_DEBUG
81
82/* allow to overwrite serial and ethaddr */
83#define CONFIG_ENV_OVERWRITE
84
85#define CONFIG_BAUDRATE 115200
86
87#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
88
89#ifndef USE_920T_MMU
90#define CONFIG_COMMANDS_tmp (CONFIG_CMD_DFL & ~CFG_CMD_CACHE)
91#else
92#define CONFIG_COMMANDS_tmp (CONFIG_CMD_DFL)
93#endif
94
95#ifdef CONFIG_HWFLOW
96#define CONFIG_COMMANDS (CONFIG_COMMANDS_tmp | CFG_CMD_HWFLOW)
97#else
98#define CONFIG_COMMANDS CONFIG_COMMANDS_tmp
99#endif
100
101/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
102#include <cmd_confdefs.h>
103
104#define CONFIG_BOOTDELAY 3
105#if 0
106#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600"
107#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
108#endif
109#define CONFIG_NETMASK 255.255.255.0
110#define CONFIG_IPADDR 134.98.93.36
111#define CONFIG_SERVERIP 134.98.93.22
112#if 0
113#define CONFIG_BOOTFILE "elinos-lart"
114#define CONFIG_BOOTCOMMAND "tftp; bootm"
115#endif
116
117#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
118#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
119/* what's this ? it's not used anywhere */
120#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
121#endif
122
123/*
124 * Miscellaneous configurable options
125 */
126#define CFG_LONGHELP /* undef to save memory */
127#define CFG_PROMPT "SMDK2400 # " /* Monitor Command Prompt */
128#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
129#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
130#define CFG_MAXARGS 16 /* max number of command args */
131#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
132
133#define CFG_MEMTEST_START 0x0c000000 /* memtest works on */
134#define CFG_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */
135
136#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
137
138#define CFG_LOAD_ADDR 0x0cf00000 /* default load address */
139
140/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
141/* it to wrap 100 times (total 1562500) to get 1 sec. */
142#define CFG_HZ 1562500
143
144/* valid baudrates */
145#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
146
147/*-----------------------------------------------------------------------
148 * Stack sizes
149 *
150 * The stack sizes are set up in start.S using the settings below
151 */
152#define CONFIG_STACKSIZE (128*1024) /* regular stack */
153#ifdef CONFIG_USE_IRQ
154#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
155#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
156#endif
157
158/*-----------------------------------------------------------------------
159 * Physical Memory Map
160 */
161#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
162#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */
163#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
164
165#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
166#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
167
168#define CFG_FLASH_BASE PHYS_FLASH_1
169
170/*-----------------------------------------------------------------------
171 * FLASH and environment organization
172 */
173#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
174#define CFG_MAX_FLASH_SECT (64) /* max number of sectors on one chip */
175
176/* timeout values are in ticks */
177#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
178#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
179
180#define CFG_ENV_IS_IN_FLASH 1
181
182/* Address and size of Primary Environment Sector */
183#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x40000)
184#define CFG_ENV_SIZE 0x40000
185
186/* Address and size of Redundant Environment Sector */
187#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SIZE)
188#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
189
190#endif /* __CONFIG_H */