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Marek Vasut2e499842010-05-11 04:31:44 +02001/*
2 * Toradex Colibri PXA270 configuration file
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
Marcel Ziswiler85559672015-03-01 00:53:13 +01005 * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com>
Marek Vasut2e499842010-05-11 04:31:44 +02006 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut2e499842010-05-11 04:31:44 +02008 */
9
Marcel Ziswiler7c49b522015-03-01 00:53:15 +010010#ifndef __CONFIG_H
11#define __CONFIG_H
Marek Vasut2e499842010-05-11 04:31:44 +020012
13/*
14 * High Level Board Configuration Options
15 */
Marek Vasutabc20ab2011-11-26 07:20:07 +010016#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
Marek Vasutf9f54862011-11-26 07:15:36 +010017#define CONFIG_SYS_TEXT_BASE 0x0
Marcel Ziswiler7c49b522015-03-01 00:53:15 +010018/* Avoid overwriting factory configuration block */
19#define CONFIG_BOARD_SIZE_LIMIT 0x40000
Marek Vasut2e499842010-05-11 04:31:44 +020020
Marcel Ziswiler4f9bbd92015-08-16 04:16:35 +020021/* We will never enable dcache because we have to setup MMU first */
22#define CONFIG_SYS_DCACHE_OFF
23
Marek Vasut2e499842010-05-11 04:31:44 +020024/*
25 * Environment settings
26 */
Marek Vasutf9f54862011-11-26 07:15:36 +010027#define CONFIG_ENV_OVERWRITE
28#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
29#define CONFIG_ARCH_CPU_INIT
Marek Vasut2e499842010-05-11 04:31:44 +020030#define CONFIG_BOOTCOMMAND \
Marcel Ziswiler99d672f2015-03-01 00:53:16 +010031 "if fatload mmc 0 0xa0000000 uImage; then " \
Marek Vasut2e499842010-05-11 04:31:44 +020032 "bootm 0xa0000000; " \
33 "fi; " \
34 "if usb reset && fatload usb 0 0xa0000000 uImage; then " \
35 "bootm 0xa0000000; " \
36 "fi; " \
Marcel Ziswiler99d672f2015-03-01 00:53:16 +010037 "bootm 0xc0000;"
Marek Vasut2e499842010-05-11 04:31:44 +020038#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
39#define CONFIG_TIMESTAMP
Marek Vasut2e499842010-05-11 04:31:44 +020040#define CONFIG_CMDLINE_TAG
41#define CONFIG_SETUP_MEMORY_TAGS
Marek Vasut2e499842010-05-11 04:31:44 +020042
43/*
44 * Serial Console Configuration
45 */
46#define CONFIG_PXA_SERIAL
47#define CONFIG_FFUART 1
Marek Vasutce6971c2012-09-12 12:36:25 +020048#define CONFIG_CONS_INDEX 3
Marek Vasut2e499842010-05-11 04:31:44 +020049#define CONFIG_BAUDRATE 115200
Marek Vasut2e499842010-05-11 04:31:44 +020050
51/*
52 * Bootloader Components Configuration
53 */
Marek Vasut2e499842010-05-11 04:31:44 +020054#define CONFIG_CMD_ENV
Marek Vasut2e499842010-05-11 04:31:44 +020055
Marcel Ziswiler3664fa12015-08-16 04:16:36 +020056/* I2C support */
57#ifdef CONFIG_SYS_I2C
Marcel Ziswiler3664fa12015-08-16 04:16:36 +020058#define CONFIG_SYS_I2C_PXA
59#define CONFIG_PXA_STD_I2C
60#define CONFIG_PXA_PWR_I2C
61#define CONFIG_SYS_I2C_SPEED 100000
62#endif
63
Marcel Ziswiler4f9bbd92015-08-16 04:16:35 +020064/* LCD support */
65#ifdef CONFIG_LCD
66#define CONFIG_PXA_LCD
67#define CONFIG_PXA_VGA
68#define CONFIG_SYS_WHITE_ON_BLACK
Marcel Ziswiler4f9bbd92015-08-16 04:16:35 +020069#define CONFIG_CMD_BMP
70#define CONFIG_LCD_LOGO
71#endif
72
Marek Vasut2e499842010-05-11 04:31:44 +020073/*
74 * Networking Configuration
Marek Vasut2e499842010-05-11 04:31:44 +020075 */
76#ifdef CONFIG_CMD_NET
Marek Vasut2e499842010-05-11 04:31:44 +020077
Marek Vasut2e499842010-05-11 04:31:44 +020078#define CONFIG_DRIVER_DM9000 1
79#define CONFIG_DM9000_BASE 0x08000000
80#define DM9000_IO (CONFIG_DM9000_BASE)
81#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
82#define CONFIG_NET_RETRY_COUNT 10
83
84#define CONFIG_BOOTP_BOOTFILESIZE
85#define CONFIG_BOOTP_BOOTPATH
86#define CONFIG_BOOTP_GATEWAY
87#define CONFIG_BOOTP_HOSTNAME
88#endif
89
Marcel Ziswilerfe488a82015-03-01 00:53:14 +010090#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */
Marek Vasutf9f54862011-11-26 07:15:36 +010091#define CONFIG_SYS_CBSIZE 256
92#define CONFIG_SYS_PBSIZE \
93 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
94#define CONFIG_SYS_MAXARGS 16
95#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Marek Vasut2e499842010-05-11 04:31:44 +020096#define CONFIG_SYS_DEVICE_NULLDEV 1
Marek Vasutf9f54862011-11-26 07:15:36 +010097#define CONFIG_CMDLINE_EDITING 1
98#define CONFIG_AUTO_COMPLETE 1
99
Marek Vasut2e499842010-05-11 04:31:44 +0200100/*
101 * Clock Configuration
102 */
Marek Vasutf9f54862011-11-26 07:15:36 +0100103#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
Marek Vasut2e499842010-05-11 04:31:44 +0200104
105/*
Marek Vasut2e499842010-05-11 04:31:44 +0200106 * DRAM Map
107 */
108#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
109#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
110#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
111
112#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
113#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
114
115#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
116#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
117
Marek Vasutf9f54862011-11-26 07:15:36 +0100118#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200119#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Marek Vasutf9f54862011-11-26 07:15:36 +0100120#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200121
Marek Vasut2e499842010-05-11 04:31:44 +0200122/*
123 * NOR FLASH
124 */
125#ifdef CONFIG_CMD_FLASH
126#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
Marcel Ziswilerd8178892015-08-16 04:16:34 +0200127#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
Marek Vasut2e499842010-05-11 04:31:44 +0200128#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
129
130#define CONFIG_SYS_FLASH_CFI
131#define CONFIG_FLASH_CFI_DRIVER 1
Marcel Ziswilerd8178892015-08-16 04:16:34 +0200132#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
Marek Vasut2e499842010-05-11 04:31:44 +0200133
134#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
135#define CONFIG_SYS_MAX_FLASH_BANKS 1
136
Marek Vasutf9f54862011-11-26 07:15:36 +0100137#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ)
138#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ)
Marcel Ziswilerd8178892015-08-16 04:16:34 +0200139#define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ)
140#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ)
Marek Vasut2e499842010-05-11 04:31:44 +0200141
142#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
143#define CONFIG_SYS_FLASH_PROTECTION 1
144
145#define CONFIG_ENV_IS_IN_FLASH 1
146
147#else /* No flash */
148#define CONFIG_SYS_NO_FLASH
Marcel Ziswiler50dea462015-03-01 00:53:12 +0100149#define CONFIG_ENV_IS_NOWHERE
Marek Vasut2e499842010-05-11 04:31:44 +0200150#endif
151
Marek Vasutf9f54862011-11-26 07:15:36 +0100152#define CONFIG_SYS_MONITOR_BASE 0x0
Marcel Ziswiler7c49b522015-03-01 00:53:15 +0100153#define CONFIG_SYS_MONITOR_LEN 0x40000
Marek Vasut2e499842010-05-11 04:31:44 +0200154
Marcel Ziswiler7c49b522015-03-01 00:53:15 +0100155/* Skip factory configuration block */
Marek Vasutf9f54862011-11-26 07:15:36 +0100156#define CONFIG_ENV_ADDR \
Marcel Ziswiler7c49b522015-03-01 00:53:15 +0100157 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
Marek Vasutf9f54862011-11-26 07:15:36 +0100158#define CONFIG_ENV_SIZE 0x40000
159#define CONFIG_ENV_SECT_SIZE 0x40000
Marek Vasut2e499842010-05-11 04:31:44 +0200160
161/*
162 * GPIO settings
163 */
164#define CONFIG_SYS_GPSR0_VAL 0x00000000
165#define CONFIG_SYS_GPSR1_VAL 0x00020000
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100166#define CONFIG_SYS_GPSR2_VAL 0x0002c000
Marek Vasut2e499842010-05-11 04:31:44 +0200167#define CONFIG_SYS_GPSR3_VAL 0x00000000
168
169#define CONFIG_SYS_GPCR0_VAL 0x00000000
170#define CONFIG_SYS_GPCR1_VAL 0x00000000
171#define CONFIG_SYS_GPCR2_VAL 0x00000000
172#define CONFIG_SYS_GPCR3_VAL 0x00000000
173
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100174#define CONFIG_SYS_GPDR0_VAL 0xc8008000
175#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
176#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
177#define CONFIG_SYS_GPDR3_VAL 0x0061e804
Marek Vasut2e499842010-05-11 04:31:44 +0200178
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100179#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
180#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
181#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
182#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
183#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
184#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
185#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
186#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
Marek Vasut2e499842010-05-11 04:31:44 +0200187
188#define CONFIG_SYS_PSSR_VAL 0x30
189
190/*
191 * Clock settings
192 */
193#define CONFIG_SYS_CKEN 0x00500240
194#define CONFIG_SYS_CCCR 0x02000290
195
196/*
197 * Memory settings
198 */
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100199#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
200#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
201#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
202#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
203#define CONFIG_SYS_MDREFR_VAL 0x2003a031
204#define CONFIG_SYS_MDMRS_VAL 0x00220022
205#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
Marek Vasut2e499842010-05-11 04:31:44 +0200206#define CONFIG_SYS_SXCNFG_VAL 0x40044004
207
208/*
209 * PCMCIA and CF Interfaces
210 */
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100211#define CONFIG_SYS_MECR_VAL 0x00000000
212#define CONFIG_SYS_MCMEM0_VAL 0x00028307
Marek Vasut2e499842010-05-11 04:31:44 +0200213#define CONFIG_SYS_MCMEM1_VAL 0x00014307
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100214#define CONFIG_SYS_MCATT0_VAL 0x00038787
Marek Vasut2e499842010-05-11 04:31:44 +0200215#define CONFIG_SYS_MCATT1_VAL 0x0001c787
Marcel Ziswiler44ba7a32015-03-01 00:53:19 +0100216#define CONFIG_SYS_MCIO0_VAL 0x0002830f
Marek Vasut2e499842010-05-11 04:31:44 +0200217#define CONFIG_SYS_MCIO1_VAL 0x0001430f
218
Marek Vasut67a1f002011-11-26 11:27:50 +0100219#include "pxa-common.h"
Marek Vasut2e499842010-05-11 04:31:44 +0200220
Marcel Ziswiler7c49b522015-03-01 00:53:15 +0100221#endif /* __CONFIG_H */