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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenk414eec32005-04-02 22:37:54 +00002 * (C) Copyright 2002-2005
wdenkc6097192002-11-03 00:24:07 +00003 * Gary Jennejohn <gj@denx.de>
4 *
5 * Configuation settings for the TRAB board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
wdenkb2001f22003-12-20 22:45:10 +000029/*
30 * Default configuration is with 8 MB Flash, 32 MB RAM
31 */
32#if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
33# define CONFIG_FLASH_8MB /* 8 MB Flash */
wdenkb0639ca2003-09-17 22:48:07 +000034#endif
wdenkb2001f22003-12-20 22:45:10 +000035#if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
36# define CONFIG_RAM_32MB /* 32 MB SDRAM */
37#endif
wdenkb0639ca2003-09-17 22:48:07 +000038
wdenkc6097192002-11-03 00:24:07 +000039/*
wdenkc6097192002-11-03 00:24:07 +000040 * High Level Configuration Options
41 * (easy to change)
42 */
43#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
wdenk6dff5522003-07-15 07:45:49 +000044#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
45#define CONFIG_TRAB 1 /* on a TRAB Board */
46#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
wdenk149dded2003-09-10 18:20:28 +000047#define LITTLEENDIAN 1 /* used by usb_ohci.c */
wdenkc6097192002-11-03 00:24:07 +000048
wdenkf54ebdf2003-09-17 15:10:32 +000049/* automatic software updates (see board/trab/auto_update.c) */
50#define CONFIG_AUTO_UPDATE 1
51
wdenkc6097192002-11-03 00:24:07 +000052/* input clock of PLL */
wdenk7f6c2cb2002-11-10 22:06:23 +000053#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
wdenkc6097192002-11-03 00:24:07 +000054
55#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
56
57#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58#define CONFIG_SETUP_MEMORY_TAGS 1
59#define CONFIG_INITRD_TAG 1
60
wdenkf72da342003-10-10 10:05:42 +000061#define CFG_DEVICE_NULLDEV 1 /* enble null device */
62#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
wdenk6dff5522003-07-15 07:45:49 +000063
wdenka0f2fe52003-10-28 09:14:21 +000064#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
65
wdenk6dff5522003-07-15 07:45:49 +000066/***********************************************************
67 * I2C stuff:
68 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
69 * address 0x54 with 8bit addressing
70 ***********************************************************/
71#define CONFIG_HARD_I2C /* I2C with hardware support */
72#define CFG_I2C_SPEED 100000 /* I2C speed */
73#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
74
75#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
76#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
77
78#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
79#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
80#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
81
wdenk149dded2003-09-10 18:20:28 +000082/* USB stuff */
Markus Klotzbuecher7b59b3c2006-11-27 11:44:58 +010083#define CONFIG_USB_OHCI_NEW 1
wdenk149dded2003-09-10 18:20:28 +000084#define CONFIG_USB_STORAGE 1
85#define CONFIG_DOS_PARTITION 1
86
Markus Klotzbuecherddf83a22006-05-30 16:56:14 +020087#undef CFG_USB_OHCI_BOARD_INIT
88#define CFG_USB_OHCI_CPU_INIT 1
Markus Klotzbuecher19d763c2007-06-06 11:49:44 +020089
90#define CFG_USB_OHCI_REGS_BASE 0x14200000
Markus Klotzbuecherddf83a22006-05-30 16:56:14 +020091#define CFG_USB_OHCI_SLOT_NAME "s3c2400"
Markus Klotzbuecher53e336e2006-11-27 11:43:09 +010092#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
Markus Klotzbuecherddf83a22006-05-30 16:56:14 +020093
wdenkc6097192002-11-03 00:24:07 +000094/*
95 * Size of malloc() pool
96 */
wdenk699b13a2002-11-03 18:03:52 +000097#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
wdenka8c7c702003-12-06 19:49:23 +000098#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenkc6097192002-11-03 00:24:07 +000099
100/*
101 * Hardware drivers
102 */
103#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
104#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
105#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
106
wdenk6dff5522003-07-15 07:45:49 +0000107#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
108
wdenkc6097192002-11-03 00:24:07 +0000109#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
110#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
111
112/*
113 * select serial console configuration
114 */
wdenk6dff5522003-07-15 07:45:49 +0000115#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
wdenkc6097192002-11-03 00:24:07 +0000116
117#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
118
119#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
120
121#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
122
123/*
124 * The following enables modem debugging stuff. The dbg() and
125 * 'char screen[1024]' are used for debug printfs. Unfortunately,
126 * it is usable only from BDI
127 */
128#undef CONFIG_MODEM_SUPPORT_DEBUG
129
130/* allow to overwrite serial and ethaddr */
131#define CONFIG_ENV_OVERWRITE
132
133#define CONFIG_BAUDRATE 115200
134
135#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
136
wdenk48b42612003-06-19 23:01:32 +0000137/* Use s3c2400's RTC */
138#define CONFIG_RTC_S3C24X0 1
139
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500140
141/*
Jon Loeliger079a1362007-07-10 10:12:10 -0500142 * BOOTP options
143 */
144#define CONFIG_BOOTP_BOOTFILESIZE
145#define CONFIG_BOOTP_BOOTPATH
146#define CONFIG_BOOTP_GATEWAY
147#define CONFIG_BOOTP_HOSTNAME
148
149
150/*
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500151 * Command line configuration.
152 */
153#include <config_cmd_default.h>
154
155#define CONFIG_CMD_BSP
156#define CONFIG_CMD_DATE
157#define CONFIG_CMD_DHCP
158#define CONFIG_CMD_FAT
159#define CONFIG_CMD_NFS
160#define CONFIG_CMD_SNTP
161#define CONFIG_CMD_USB
162
wdenkc6097192002-11-03 00:24:07 +0000163#ifdef CONFIG_HWFLOW
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500164 #define CONFIG_CMD_HWFLOW
wdenkc6097192002-11-03 00:24:07 +0000165#endif
166
167#ifdef CONFIG_VFD
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500168 #define CONFIG_CMD_VFD
wdenkc6097192002-11-03 00:24:07 +0000169#endif
170
wdenk6dff5522003-07-15 07:45:49 +0000171#ifdef CONFIG_DRIVER_S3C24X0_I2C
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500172 #define CONFIG_CMD_EEPROM
173 #define CONFIG_CMD_I2C
wdenk6dff5522003-07-15 07:45:49 +0000174#endif
175
wdenkc6097192002-11-03 00:24:07 +0000176#ifndef USE_920T_MMU
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500177 #undef CONFIG_CMD_CACHE
wdenkc6097192002-11-03 00:24:07 +0000178#endif
179
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500180
wdenk149dded2003-09-10 18:20:28 +0000181/* moved up */
182#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
183
wdenkc6097192002-11-03 00:24:07 +0000184#define CONFIG_BOOTDELAY 5
wdenkc8c3a8b2003-05-21 20:26:20 +0000185#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
wdenkc6097192002-11-03 00:24:07 +0000186#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
wdenk6dff5522003-07-15 07:45:49 +0000187#define CONFIG_BOOTARGS "console=ttyS0"
188#define CONFIG_NETMASK 255.255.0.0
wdenk6069ff22003-02-28 00:49:47 +0000189#define CONFIG_IPADDR 192.168.3.68
wdenk43d96162003-03-06 00:02:04 +0000190#define CONFIG_HOSTNAME trab
wdenkc6097192002-11-03 00:24:07 +0000191#define CONFIG_SERVERIP 192.168.3.1
wdenka0ff7f22003-10-09 13:16:55 +0000192#define CONFIG_BOOTCOMMAND "burn_in"
wdenk47cd00f2003-03-06 13:39:27 +0000193
wdenkb0639ca2003-09-17 22:48:07 +0000194#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
wdenk149dded2003-09-10 18:20:28 +0000195#ifdef CFG_HUSH_PARSER
196#define CONFIG_EXTRA_ENV_SETTINGS \
197 "nfs_args=setenv bootargs root=/dev/nfs rw " \
198 "nfsroot=$serverip:$rootpath\0" \
199 "rootpath=/opt/eldk/arm_920TDI\0" \
200 "ram_args=setenv bootargs root=/dev/ram rw\0" \
201 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
202 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
203 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000204 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
205 "load=tftp C100000 ${u-boot}\0" \
206 "update=protect off 0 5FFFF;era 0 5FFFF;" \
207 "cp.b C100000 0 $filesize\0" \
wdenk149dded2003-09-10 18:20:28 +0000208 "loadfile=/tftpboot/TRAB/uImage\0" \
209 "loadaddr=c400000\0" \
210 "net_load=tftpboot $loadaddr $loadfile\0" \
211 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenk4654af22003-10-22 09:00:28 +0000212 "kernel_addr=00060000\0" \
wdenk149dded2003-09-10 18:20:28 +0000213 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
214 "mdm_init1=ATZ\0" \
215 "mdm_init2=ATS0=1\0" \
216 "mdm_flow_control=rts/cts\0"
217#else /* !CFG_HUSH_PARSER */
wdenkc6097192002-11-03 00:24:07 +0000218#define CONFIG_EXTRA_ENV_SETTINGS \
219 "nfs_args=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100220 "nfsroot=${serverip}:${rootpath}\0" \
wdenkc6097192002-11-03 00:24:07 +0000221 "rootpath=/opt/eldk/arm_920TDI\0" \
222 "ram_args=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100223 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
224 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
225 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000226 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100227 "load=tftp C100000 ${u-boot}\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000228 "update=protect off 0 5FFFF;era 0 5FFFF;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100229 "cp.b C100000 0 ${filesize}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000230 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkc6097192002-11-03 00:24:07 +0000231 "loadaddr=c400000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100232 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
wdenkc6097192002-11-03 00:24:07 +0000233 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000234 "kernel_addr=000C0000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100235 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
wdenkc6097192002-11-03 00:24:07 +0000236 "mdm_init1=ATZ\0" \
237 "mdm_init2=ATS0=1\0" \
238 "mdm_flow_control=rts/cts\0"
wdenkf54ebdf2003-09-17 15:10:32 +0000239#endif /* CFG_HUSH_PARSER */
wdenkb0639ca2003-09-17 22:48:07 +0000240#else /* CONFIG_FLASH_8MB => 8 MB flash */
wdenk149dded2003-09-10 18:20:28 +0000241#ifdef CFG_HUSH_PARSER
242#define CONFIG_EXTRA_ENV_SETTINGS \
243 "nfs_args=setenv bootargs root=/dev/nfs rw " \
244 "nfsroot=$serverip:$rootpath\0" \
245 "rootpath=/opt/eldk/arm_920TDI\0" \
246 "ram_args=setenv bootargs root=/dev/ram rw\0" \
247 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
248 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
249 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
wdenkefa329c2004-03-23 20:18:25 +0000250 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000251 "load=tftp C100000 ${u-boot}\0" \
252 "update=protect off 0 3FFFF;era 0 3FFFF;" \
253 "cp.b C100000 0 $filesize;" \
254 "setenv filesize;saveenv\0" \
wdenk149dded2003-09-10 18:20:28 +0000255 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000256 "loadaddr=C400000\0" \
wdenk149dded2003-09-10 18:20:28 +0000257 "net_load=tftpboot $loadaddr $loadfile\0" \
258 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000259 "kernel_addr=000C0000\0" \
wdenk149dded2003-09-10 18:20:28 +0000260 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
261 "mdm_init1=ATZ\0" \
262 "mdm_init2=ATS0=1\0" \
263 "mdm_flow_control=rts/cts\0"
264#else /* !CFG_HUSH_PARSER */
wdenk47cd00f2003-03-06 13:39:27 +0000265#define CONFIG_EXTRA_ENV_SETTINGS \
266 "nfs_args=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100267 "nfsroot=${serverip}:${rootpath}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000268 "rootpath=/opt/eldk/arm_920TDI\0" \
269 "ram_args=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100270 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
271 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
272 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
wdenkefa329c2004-03-23 20:18:25 +0000273 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100274 "load=tftp C100000 ${u-boot}\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000275 "update=protect off 0 3FFFF;era 0 3FFFF;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100276 "cp.b C100000 0 ${filesize};" \
wdenkf54ebdf2003-09-17 15:10:32 +0000277 "setenv filesize;saveenv\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000278 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000279 "loadaddr=C400000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100280 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000281 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
wdenkf54ebdf2003-09-17 15:10:32 +0000282 "kernel_addr=000C0000\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100283 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
wdenk47cd00f2003-03-06 13:39:27 +0000284 "mdm_init1=ATZ\0" \
285 "mdm_init2=ATS0=1\0" \
286 "mdm_flow_control=rts/cts\0"
wdenk149dded2003-09-10 18:20:28 +0000287#endif /* CFG_HUSH_PARSER */
wdenkb0639ca2003-09-17 22:48:07 +0000288#endif /* CONFIG_FLASH_8MB */
wdenkc6097192002-11-03 00:24:07 +0000289
wdenk151ab832005-02-24 22:44:16 +0000290#if 1 /* feel free to disable for development */
wdenkc6097192002-11-03 00:24:07 +0000291#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
292#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
wdenk151ab832005-02-24 22:44:16 +0000293#define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
wdenkc6097192002-11-03 00:24:07 +0000294#endif
295
Jon Loeliger6c18eb92007-07-04 22:33:38 -0500296#if defined(CONFIG_CMD_KGDB)
wdenkc6097192002-11-03 00:24:07 +0000297#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
298/* what's this ? it's not used anywhere */
299#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
300#endif
301
302/*
303 * Miscellaneous configurable options
304 */
305#define CFG_LONGHELP /* undef to save memory */
306#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
wdenk6dff5522003-07-15 07:45:49 +0000307#ifdef CFG_HUSH_PARSER
308#define CFG_PROMPT_HUSH_PS2 "> "
309#endif
310
wdenkc6097192002-11-03 00:24:07 +0000311#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
312#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
313#define CFG_MAXARGS 16 /* max number of command args */
314#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
315
wdenkf54ebdf2003-09-17 15:10:32 +0000316#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
317#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
wdenkc6097192002-11-03 00:24:07 +0000318
wdenk6dff5522003-07-15 07:45:49 +0000319#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
wdenkc6097192002-11-03 00:24:07 +0000320
wdenkf54ebdf2003-09-17 15:10:32 +0000321#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
wdenkc6097192002-11-03 00:24:07 +0000322
323#ifdef CONFIG_TRAB_50MHZ
324/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
325/* it to wrap 100 times (total 1562500) to get 1 sec. */
326/* this should _really_ be calculated !! */
327#define CFG_HZ 1562500
328#else
329/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
330/* it to wrap 100 times (total 1039000) to get 1 sec. */
331/* this should _really_ be calculated !! */
332#define CFG_HZ 1039000
333#endif
334
335/* valid baudrates */
336#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
337
338#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
339
340/*-----------------------------------------------------------------------
wdenka0ff7f22003-10-09 13:16:55 +0000341 * burn-in test stuff.
wdenk42d1f032003-10-15 23:53:47 +0000342 *
wdenka0ff7f22003-10-09 13:16:55 +0000343 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
344 * Because the burn-in test itself causes also an delay of about 4 seconds,
345 * this time must be subtracted from the desired overall burn-in cycle time.
wdenk4f7cb082003-09-11 23:06:34 +0000346 */
wdenka0ff7f22003-10-09 13:16:55 +0000347#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
wdenk4f7cb082003-09-11 23:06:34 +0000348
349/*-----------------------------------------------------------------------
wdenkc6097192002-11-03 00:24:07 +0000350 * Stack sizes
351 *
352 * The stack sizes are set up in start.S using the settings below
353 */
354#define CONFIG_STACKSIZE (128*1024) /* regular stack */
355#ifdef CONFIG_USE_IRQ
356#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
357#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
358#endif
359
360/*-----------------------------------------------------------------------
361 * Physical Memory Map
362 */
wdenk6dff5522003-07-15 07:45:49 +0000363#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
wdenkf54ebdf2003-09-17 15:10:32 +0000364#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
wdenkb0639ca2003-09-17 22:48:07 +0000365#ifndef CONFIG_RAM_16MB
wdenkf54ebdf2003-09-17 15:10:32 +0000366#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
367#else
wdenk6dff5522003-07-15 07:45:49 +0000368#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
wdenkf54ebdf2003-09-17 15:10:32 +0000369#endif
wdenkc6097192002-11-03 00:24:07 +0000370
wdenk6dff5522003-07-15 07:45:49 +0000371#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
wdenkc6097192002-11-03 00:24:07 +0000372
373/* The following #defines are needed to get flash environment right */
wdenk6069ff22003-02-28 00:49:47 +0000374#define CFG_MONITOR_BASE CFG_FLASH_BASE
wdenkc6097192002-11-03 00:24:07 +0000375#define CFG_MONITOR_LEN (256 << 10)
376
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200377/* Dynamic MTD partition support */
378#define CONFIG_JFFS2_CMDLINE
379#define MTDIDS_DEFAULT "nor0=0"
380
381/* production flash layout */
Wolfgang Denk33322402006-06-16 15:40:48 +0200382#define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200383 "16k(Env1)," \
384 "16k(Env2)," \
Wolfgang Denk33322402006-06-16 15:40:48 +0200385 "336k(Firmware2)ro," \
Wolfgang Denk6ebc7922005-10-06 01:46:57 +0200386 "896k(Kernel)," \
387 "5376k(Root-FS)," \
388 "1408k(JFFS2)," \
389 "-(VFD)"
390
wdenkc6097192002-11-03 00:24:07 +0000391/*-----------------------------------------------------------------------
392 * FLASH and environment organization
393 */
394#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
wdenkb0639ca2003-09-17 22:48:07 +0000395#ifndef CONFIG_FLASH_8MB
wdenk6069ff22003-02-28 00:49:47 +0000396#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenkf54ebdf2003-09-17 15:10:32 +0000397#else
398#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
wdenk43d96162003-03-06 00:02:04 +0000399#endif
wdenkc6097192002-11-03 00:24:07 +0000400
401/* timeout values are in ticks */
Wolfgang Denk5a3dfef2006-07-19 14:13:02 +0200402#define CFG_FLASH_ERASE_TOUT (15*CFG_HZ) /* Timeout for Flash Erase */
wdenkc6097192002-11-03 00:24:07 +0000403#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
404
405#define CFG_ENV_IS_IN_FLASH 1
406
407/* Address and size of Primary Environment Sector */
wdenkb0639ca2003-09-17 22:48:07 +0000408#ifndef CONFIG_FLASH_8MB
wdenkf54ebdf2003-09-17 15:10:32 +0000409#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
410#define CFG_ENV_SIZE 0x4000
411#define CFG_ENV_SECT_SIZE 0x20000
412#else
Wolfgang Denkfb34a9a2005-09-26 23:40:37 +0200413#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
wdenkc6097192002-11-03 00:24:07 +0000414#define CFG_ENV_SIZE 0x4000
wdenk43d96162003-03-06 00:02:04 +0000415#define CFG_ENV_SECT_SIZE 0x4000
wdenk43d96162003-03-06 00:02:04 +0000416#endif
wdenkc6097192002-11-03 00:24:07 +0000417
418/* Address and size of Redundant Environment Sector */
wdenk43d96162003-03-06 00:02:04 +0000419#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
wdenkc6097192002-11-03 00:24:07 +0000420#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
421
Wolfgang Denk67c31032007-09-16 17:10:04 +0200422#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
423
wdenk1cb8e982003-03-06 21:55:29 +0000424/* Initial value of the on-board touch screen brightness */
425#define CFG_BRIGHTNESS 0x20
426
wdenkc6097192002-11-03 00:24:07 +0000427#endif /* __CONFIG_H */