blob: 5cfee66229bcccada6e16d0ea4bb9ec8a8914a3e [file] [log] [blame]
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +02001/*
2 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
3 *
4 * Configuation settings for the TI OMAP NetStar board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28#include <configs/omap1510.h>
29
30/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP1510 1 /* which is in a 5910 */
37
38/* Input clock of PLL */
39#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
40#define CONFIG_XTAL_FREQ 12000000
41
42#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44#define CONFIG_MISC_INIT_R /* There is nothing to really init */
45#define BOARD_LATE_INIT /* but we flash the LEDs here */
46
47#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48#define CONFIG_SETUP_MEMORY_TAGS 1
49#define CONFIG_INITRD_TAG 1
50
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020051#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#define CONFIG_SYS_CONSOLE_INFO_QUIET
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020053
54/*
55 * Physical Memory Map
56 */
57#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
58#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
Peter Pearsef4e7cbf2008-02-01 16:49:08 +000059#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020060#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
61
Ladislav Michl27057d42009-03-16 23:27:31 +010062#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020064
65/*
66 * Environment settings
67 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020068#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020069#define CONFIG_ENV_ADDR 0x4000
70#define CONFIG_ENV_SIZE (8 * 1024)
71#define CONFIG_ENV_SECT_SIZE (8 * 1024)
72#define CONFIG_ENV_ADDR_REDUND 0x6000
73#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020074#define CONFIG_ENV_OVERWRITE
75
76/*
77 * Size of malloc() pool
78 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020079#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
80#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020081
82/*
83 * The stack size is set up in start.S using the settings below
84 */
Peter Pearsef4e7cbf2008-02-01 16:49:08 +000085#define CONFIG_STACKSIZE (1 * 1024 * 1024) /* regular stack */
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020086
87/*
88 * Hardware drivers
89 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090#define CONFIG_SYS_NS16550
91#define CONFIG_SYS_NS16550_SERIAL
92#define CONFIG_SYS_NS16550_REG_SIZE (-4)
93#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
Ladislav Michl27057d42009-03-16 23:27:31 +010094#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +020095
Ladislav Michl27057d42009-03-16 23:27:31 +010096#define CONFIG_DRIVER_SMC91111
97#define CONFIG_SMC91111_BASE 0x04000300
98
Ladislav Michl71f7bd32009-03-25 23:43:50 +010099#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
100#define CONFIG_SYS_MAX_FLASH_BANKS 1
101#define CONFIG_SYS_MAX_FLASH_SECT 19
102
103#define CONFIG_SYS_FLASH_CFI
104#define CONFIG_FLASH_CFI_DRIVER
105#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
106#define CONFIG_FLASH_CFI_LEGACY
107#define CONFIG_SYS_FLASH_LEGACY_512Kx16
108
Ladislav Michl27057d42009-03-16 23:27:31 +0100109#define CONFIG_SYS_MAX_NAND_DEVICE 1
110#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
111#define NAND_ALLOW_ERASE_ALL 1
112
Ladislav Michl04531f32009-03-25 23:43:58 +0100113#define CONFIG_HARD_I2C
114#define CONFIG_SYS_I2C_SPEED 100000
115#define CONFIG_SYS_I2C_SLAVE 1
116#define CONFIG_DRIVER_OMAP1510_I2C
117
118#define CONFIG_RTC_DS1307
119#define CONFIG_SYS_I2C_RTC_ADDR 0x68
120
Ladislav Michl27057d42009-03-16 23:27:31 +0100121
122#define CONFIG_CONS_INDEX 1
123#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200125
126/*#define CONFIG_SKIP_RELOCATE_UBOOT*/
127/*#define CONFIG_SKIP_LOWLEVEL_INIT */
128
129/*
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000130 * partitions (mtdparts command line support)
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200131 */
Stefan Roese68d7d652009-03-19 13:30:36 +0100132#define CONFIG_CMD_MTDPARTS
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200133#define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0"
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000134#define MTDPARTS_DEFAULT "mtdparts=" \
135 "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
136 "omapnand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200137
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200138
Jon Loeliger929a2bf2007-07-04 22:33:07 -0500139/*
140 * Command line configuration.
141 */
Jon Loeliger929a2bf2007-07-04 22:33:07 -0500142#define CONFIG_CMD_BDI
143#define CONFIG_CMD_BOOTD
Ladislav Michl04531f32009-03-25 23:43:58 +0100144#define CONFIG_CMD_DATE
Jon Loeliger929a2bf2007-07-04 22:33:07 -0500145#define CONFIG_CMD_DHCP
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500146#define CONFIG_CMD_SAVEENV
Jon Loeliger929a2bf2007-07-04 22:33:07 -0500147#define CONFIG_CMD_FLASH
148#define CONFIG_CMD_IMI
149#define CONFIG_CMD_JFFS2
150#define CONFIG_CMD_LOADB
151#define CONFIG_CMD_MEMORY
152#define CONFIG_CMD_NAND
153#define CONFIG_CMD_NET
154#define CONFIG_CMD_PING
155#define CONFIG_CMD_RUN
156
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200157
158#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200159
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -0500160/*
161 * BOOTP options
162 */
163#define CONFIG_BOOTP_SUBNETMASK
164#define CONFIG_BOOTP_GATEWAY
165#define CONFIG_BOOTP_HOSTNAME
166#define CONFIG_BOOTP_BOOTPATH
167
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200168#define CONFIG_LOOPW
169
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200170#define CONFIG_BOOTDELAY 3
171#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
172#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000174#define CONFIG_BOOTCOMMAND "run fboot"
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200175#define CONFIG_PREBOOT "run setup"
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000176#define CONFIG_EXTRA_ENV_SETTINGS \
177 "autostart=yes\0" \
178 "ospart=0\0" \
179 "setup=setenv bootargs console=ttyS0,$baudrate " \
180 "$mtdparts\0" \
181 "setpart=" \
182 "if test -n $swapos; then " \
183 "setenv swapos; saveenv; " \
184 "else " \
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200185 "if test $ospart -eq 0; then setenv ospart 1;" \
186 "else setenv ospart 0; fi; " \
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000187 "fi\0" \
188 "nfsargs=setenv bootargs $bootargs " \
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200189 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000190 "nfsroot=$rootpath root=/dev/nfs\0" \
191 "flashargs=run setpart;setenv bootargs $bootargs " \
192 "root=mtd:rootfs$ospart ro " \
193 "rootfstype=jffs2\0" \
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200194 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000195 "fboot=run flashargs;nboot kernel$ospart\0" \
196 "nboot=bootp;run nfsargs;tftp\0"
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200197
198#if 0 /* feel free to disable for development */
199#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
Stefan Roesef2302d42008-08-06 14:05:38 +0200200#define CONFIG_AUTOBOOT_PROMPT \
201 "\nNetStar PBX - boot in %d secs...\n", bootdelay
Peter Pearsef4e7cbf2008-02-01 16:49:08 +0000202#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200203#endif
204
205/*
206 * Miscellaneous configurable options
207 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_LONGHELP /* undef to save memory */
209#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
210#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
211#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
212#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
213#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200214
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define CONFIG_SYS_HUSH_PARSER
216#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200217#define CONFIG_AUTO_COMPLETE
218
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
220#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
221 (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200222
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200224
Ladislav Michl3791a112009-04-22 01:12:04 +0200225/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200226 * This time is further subdivided by a local divisor.
227 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
Ladislav Michl3791a112009-04-22 01:12:04 +0200229#define CONFIG_SYS_PTV 7
230#define CONFIG_SYS_HZ 1000
Wolfgang Denkac7eb8a32005-09-14 23:53:32 +0200231
232#define OMAP5910_DPLL_DIV 1
233#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
234 (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
235
236#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
237#define OMAP5910_LCD_DIV 2 /* CKL/4 */
238#define OMAP5910_ARM_DIV 0 /* CKL/1 */
239#define OMAP5910_DSP_DIV 0 /* CKL/1 */
240#define OMAP5910_TC_DIV 1 /* CKL/2 */
241#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
242#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
243
244#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
245#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
246 (OMAP5910_LCD_DIV << 2) | \
247 (OMAP5910_ARM_DIV << 4) | \
248 (OMAP5910_DSP_DIV << 6) | \
249 (OMAP5910_TC_DIV << 8) | \
250 (OMAP5910_DSP_MMU_DIV << 10) | \
251 (OMAP5910_ARM_TIM_SEL << 12))
252
253#endif /* __CONFIG_H */