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Stefan Roesed4451d32013-02-07 02:10:11 +00001/*
2 * (C) Copyright 2004
3 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Stefan Roesed4451d32013-02-07 02:10:11 +00006 */
7
8#define SDRAM_DDR /* is DDR */
9
10#if defined(CONFIG_MPC5200)
11/* Settings for XLB = 132 MHz */
12/* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */
13
14/* SDRAM Config Standard timing */
15#define SDRAM_MODE 0x008d0000
16#define SDRAM_EMODE 0x40010000
17#define SDRAM_CONTROL 0x70430f00
18#define SDRAM_CONFIG1 0x33622930
19#define SDRAM_CONFIG2 0x46670000
20#define SDRAM_TAPDELAY 0x10000000
21
22#else
23#error CONFIG_MPC5200 not defined
24#endif