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wdenk2262cfe2002-11-18 00:14:45 +00001/*
Bin Mengfe0c33a2014-12-12 21:05:22 +08002 * U-Boot - x86 Startup Code
wdenk2262cfe2002-11-18 00:14:45 +00003 *
Graeme Russdbf71152011-04-13 19:43:26 +10004 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02008 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk2262cfe2002-11-18 00:14:45 +00009 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
wdenk2262cfe2002-11-18 00:14:45 +000011 */
12
wdenk2262cfe2002-11-18 00:14:45 +000013#include <config.h>
Graeme Russ161b3582010-10-07 20:03:29 +110014#include <asm/global_data.h>
Simon Glassd1cd0452014-11-12 22:42:09 -070015#include <asm/post.h>
Graeme Russ109ad142011-12-31 10:24:36 +110016#include <asm/processor.h>
Graeme Russ0c24c9c2011-02-12 15:11:32 +110017#include <asm/processor-flags.h>
Graeme Russ9e6c5722011-12-31 22:58:15 +110018#include <generated/generic-asm-offsets.h>
Bin Mengfe0c33a2014-12-12 21:05:22 +080019#include <generated/asm-offsets.h>
wdenk2262cfe2002-11-18 00:14:45 +000020
wdenk2262cfe2002-11-18 00:14:45 +000021.section .text
22.code32
23.globl _start
wdenk8bde7f72003-06-27 21:31:46 +000024.type _start, @function
Graeme Russfea25722011-04-13 19:43:28 +100025.globl _x86boot_start
26_x86boot_start:
Graeme Russ077e1952010-04-24 00:05:42 +100027 /*
Simon Glassda3a95d2015-07-31 09:31:25 -060028 * This is the fail-safe 32-bit bootstrap entry point.
29 *
30 * This code is used when booting from another boot loader like
31 * coreboot or EFI. So we repeat some of the same init found in
32 * start16.
Graeme Russ077e1952010-04-24 00:05:42 +100033 */
34 cli
35 cld
36
Graeme Russ2f0e0cd2011-11-08 02:33:23 +000037 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ077e1952010-04-24 00:05:42 +100038 movl %cr0, %eax
Graeme Russ0c24c9c2011-02-12 15:11:32 +110039 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ077e1952010-04-24 00:05:42 +100040 movl %eax, %cr0
41 wbinvd
42
Gabe Black91d82a22012-11-03 11:41:28 +000043 /* Tell 32-bit code it is being entered from an in-RAM copy */
Simon Glass83ec7de2015-07-31 09:31:28 -060044 movl $GD_FLG_WARM_BOOT, %ebx
Simon Glass42fde3052015-08-04 12:33:57 -060045
46 /*
47 * Zero the BIST (Built-In Self Test) value since we don't have it.
48 * It must be 0 or the previous loader would have reported an error.
49 */
50 movl $0, %ebp
51
Gabe Black91d82a22012-11-03 11:41:28 +000052 jmp 1f
Simon Glass83ec7de2015-07-31 09:31:28 -060053
54 /* Add a way for tools to discover the _start entry point */
55 .align 4
56 .long 0x12345678
wdenk8bde7f72003-06-27 21:31:46 +000057_start:
Gabe Black91d82a22012-11-03 11:41:28 +000058 /*
Simon Glassda3a95d2015-07-31 09:31:25 -060059 * This is the 32-bit cold-reset entry point, coming from start16.
Simon Glass83ec7de2015-07-31 09:31:28 -060060 * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
Gabe Black91d82a22012-11-03 11:41:28 +000061 */
Simon Glass83ec7de2015-07-31 09:31:28 -060062 movl $GD_FLG_COLD_BOOT, %ebx
Simon Glass42fde3052015-08-04 12:33:57 -060063
Simon Glassf67cd512014-11-06 13:20:10 -070064 /* Save BIST */
65 movl %eax, %ebp
Simon Glass42fde3052015-08-04 12:33:57 -0600661:
67
68 /* Save table pointer */
69 movl %ecx, %esi
Graeme Russ077e1952010-04-24 00:05:42 +100070
Simon Glassda3a95d2015-07-31 09:31:25 -060071 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ109ad142011-12-31 10:24:36 +110072 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ8ffb2e82010-10-07 20:03:21 +110073 movw %ax, %fs
74 movw %ax, %ds
75 movw %ax, %gs
76 movw %ax, %es
77 movw %ax, %ss
wdenk8bde7f72003-06-27 21:31:46 +000078
Mike Williams16263082011-07-22 04:01:30 +000079 /* Clear the interrupt vectors */
Graeme Russ077e1952010-04-24 00:05:42 +100080 lidt blank_idt_ptr
81
Simon Glassda3a95d2015-07-31 09:31:25 -060082 /*
83 * Critical early platform init - generally not used, we prefer init
84 * to happen later when we have a console, in case something goes
85 * wrong.
86 */
wdenk2262cfe2002-11-18 00:14:45 +000087 jmp early_board_init
Graeme Russ88fa0a62010-10-07 20:03:27 +110088.globl early_board_init_ret
wdenk2262cfe2002-11-18 00:14:45 +000089early_board_init_ret:
Simon Glassd1cd0452014-11-12 22:42:09 -070090 post_code(POST_START)
wdenk8bde7f72003-06-27 21:31:46 +000091
Graeme Russed4cba72011-02-12 15:11:52 +110092 /* Initialise Cache-As-RAM */
93 jmp car_init
94.globl car_init_ret
95car_init_ret:
Bin Mengbceb9f02014-12-12 21:05:31 +080096#ifndef CONFIG_HAVE_FSP
Graeme Russed4cba72011-02-12 15:11:52 +110097 /*
98 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
99 * or fully initialised SDRAM - we really don't care which)
100 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glassda3a95d2015-07-31 09:31:25 -0600101 * and early malloc() area. The MRC requires some space at the top.
Simon Glass76f90f32014-11-06 13:20:04 -0700102 *
103 * Stack grows down from top of CAR. We have:
104 *
105 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass65dd74a2014-11-12 22:42:28 -0700106 * MRC area
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600107 * global_data with x86 global descriptor table
Simon Glass76f90f32014-11-06 13:20:04 -0700108 * early malloc area
109 * stack
110 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russed4cba72011-02-12 15:11:52 +1100111 */
Simon Glass65dd74a2014-11-12 22:42:28 -0700112 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
113#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
114 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
115#endif
Bin Mengbceb9f02014-12-12 21:05:31 +0800116#else
117 /*
Bin Meng48aa6c22015-08-20 06:40:20 -0700118 * U-Boot enters here twice. For the first time it comes from
119 * car_init_done() with esp points to a temporary stack and esi
120 * set to zero. For the second time it comes from fsp_init_done()
121 * with esi holding the HOB list address returned by the FSP.
Bin Mengbceb9f02014-12-12 21:05:31 +0800122 */
123#endif
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600124 /* Set up global data */
125 mov %esp, %eax
126 call board_init_f_mem
127 mov %eax, %esp
Graeme Russ8d616252012-11-27 15:38:36 +0000128
Simon Glass60994a02015-10-18 19:51:26 -0600129#ifdef CONFIG_DEBUG_UART
130 call debug_uart_init
131#endif
Simon Glassbbbe55f2015-08-02 18:07:21 -0600132
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600133 /* Get address of global_data */
134 mov %fs:0, %edx
Bin Mengbceb9f02014-12-12 21:05:31 +0800135#ifdef CONFIG_HAVE_FSP
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600136 /* Store the HOB list if we have one */
Bin Mengaefaff82015-06-07 11:33:14 +0800137 test %esi, %esi
138 jz skip_hob
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600139 movl %esi, GD_HOB_LIST(%edx)
Bin Mengbceb9f02014-12-12 21:05:31 +0800140
Bin Meng57b10f52015-08-20 06:40:19 -0700141 /*
142 * After fsp_init() returns, the stack has already been switched to a
143 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
144 * Enlarge the size of malloc() pool before relocation since we have
145 * plenty of memory now.
146 */
147 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
148 movl %esp, GD_MALLOC_BASE(%edx)
Bin Mengaefaff82015-06-07 11:33:14 +0800149skip_hob:
Simon Glass42fde3052015-08-04 12:33:57 -0600150#else
151 /* Store table pointer */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600152 movl %esi, GD_TABLE(%edx)
Bin Mengaefaff82015-06-07 11:33:14 +0800153#endif
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600154 /* Store BIST */
155 movl %ebp, GD_BIST(%edx)
Graeme Russ9e6c5722011-12-31 22:58:15 +1100156
Graeme Russ96cd6642011-02-12 15:11:54 +1100157 /* Set parameter to board_init_f() to boot flags */
Simon Glassd1cd0452014-11-12 22:42:09 -0700158 post_code(POST_START_DONE)
Graeme Russdbf71152011-04-13 19:43:26 +1000159 xorl %eax, %eax
Graeme Russ161b3582010-10-07 20:03:29 +1100160
Simon Glassda3a95d2015-07-31 09:31:25 -0600161 /* Enter, U-Boot! */
Graeme Russdbf71152011-04-13 19:43:26 +1000162 call board_init_f
wdenk2262cfe2002-11-18 00:14:45 +0000163
164 /* indicate (lack of) progress */
wdenk8bde7f72003-06-27 21:31:46 +0000165 movw $0x85, %ax
Graeme Russfb002902011-02-12 15:11:58 +1100166 jmp die
167
Graeme Russf48dd6f2012-01-01 15:06:39 +1100168.globl board_init_f_r_trampoline
169.type board_init_f_r_trampoline, @function
170board_init_f_r_trampoline:
Graeme Russfb002902011-02-12 15:11:58 +1100171 /*
172 * SDRAM has been initialised, U-Boot code has been copied into
173 * RAM, BSS has been cleared and relocation adjustments have been
174 * made. It is now time to jump into the in-RAM copy of U-Boot
175 *
Graeme Russf48dd6f2012-01-01 15:06:39 +1100176 * %eax = Address of top of new stack
Graeme Russfb002902011-02-12 15:11:58 +1100177 */
178
Graeme Russ8d616252012-11-27 15:38:36 +0000179 /* Stack grows down from top of SDRAM */
Graeme Russfb002902011-02-12 15:11:58 +1100180 movl %eax, %esp
181
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600182 /* See if we need to disable CAR */
Simon Glass801d70c2015-01-01 16:18:13 -0700183.weak car_uninit
184 movl $car_uninit, %eax
185 cmpl $0, %eax
186 jz 1f
187
188 call car_uninit
1891:
Simon Glassda3a95d2015-07-31 09:31:25 -0600190 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russf48dd6f2012-01-01 15:06:39 +1100191 call board_init_f_r
Graeme Russfb002902011-02-12 15:11:58 +1100192
Graeme Russ2f0e0cd2011-11-08 02:33:23 +0000193die:
194 hlt
wdenk2262cfe2002-11-18 00:14:45 +0000195 jmp die
wdenk8bde7f72003-06-27 21:31:46 +0000196 hlt
Graeme Russ077e1952010-04-24 00:05:42 +1000197
198blank_idt_ptr:
199 .word 0 /* limit */
200 .long 0 /* base */
Graeme Russa206cc22011-11-08 02:33:19 +0000201
202 .p2align 2 /* force 4-byte alignment */
203
Simon Glassda3a95d2015-07-31 09:31:25 -0600204 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russa206cc22011-11-08 02:33:19 +0000205multiboot_header:
206 /* magic */
Simon Glassda3a95d2015-07-31 09:31:25 -0600207 .long 0x1badb002
Graeme Russa206cc22011-11-08 02:33:19 +0000208 /* flags */
209 .long (1 << 16)
210 /* checksum */
211 .long -0x1BADB002 - (1 << 16)
212 /* header addr */
213 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
214 /* load addr */
215 .long CONFIG_SYS_TEXT_BASE
216 /* load end addr */
217 .long 0
218 /* bss end addr */
219 .long 0
220 /* entry addr */
221 .long CONFIG_SYS_TEXT_BASE