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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * ARM Ltd.
15 * Philippe Robin, <philippe.robin@arm.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020027 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk3d3befa2004-03-14 15:06:13 +000028 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35
36#include <common.h>
37
Wolfgang Denkd87080b2006-03-31 18:32:53 +020038DECLARE_GLOBAL_DATA_PTR;
39
wdenk3d3befa2004-03-14 15:06:13 +000040void peripheral_power_enable (void);
41
42#if defined(CONFIG_SHOW_BOOT_PROGRESS)
43void show_boot_progress(int progress)
44{
Wolfgang Denk74f43042005-09-25 01:48:28 +020045 printf("Boot reached stage %d\n", progress);
wdenk3d3befa2004-03-14 15:06:13 +000046}
47#endif
48
49#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
50
wdenk3d3befa2004-03-14 15:06:13 +000051/*
52 * Miscellaneous platform dependent initialisations
53 */
54
55int board_init (void)
56{
wdenk3d3befa2004-03-14 15:06:13 +000057 /* arch number of Integrator Board */
wdenk731215e2004-10-10 18:41:04 +000058 gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
wdenk3d3befa2004-03-14 15:06:13 +000059
60 /* adress of boot parameters */
61 gd->bd->bi_boot_params = 0x00000100;
62
wdenkbc54f302004-07-11 18:10:30 +000063 gd->flags = 0;
64
Wolfgang Denk74f43042005-09-25 01:48:28 +020065#ifdef CONFIG_CM_REMAP
66extern void cm_remap(void);
67 cm_remap(); /* remaps writeable memory to 0x00000000 */
68#endif
69
wdenk3d3befa2004-03-14 15:06:13 +000070 icache_enable ();
71
wdenk3d3befa2004-03-14 15:06:13 +000072 return 0;
73}
74
wdenk3d3befa2004-03-14 15:06:13 +000075int misc_init_r (void)
76{
77 setenv("verify", "n");
78 return (0);
79}
80
81/******************************
82 Routine:
83 Description:
84******************************/
wdenk3d3befa2004-03-14 15:06:13 +000085int dram_init (void)
86{
Wolfgang Denk74f43042005-09-25 01:48:28 +020087 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020088 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
Wolfgang Denk74f43042005-09-25 01:48:28 +020089
90#ifdef CONFIG_CM_SPD_DETECT
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020091 {
Wolfgang Denk74f43042005-09-25 01:48:28 +020092extern void dram_query(void);
93 unsigned long cm_reg_sdram;
94 unsigned long sdram_shift;
95
96 dram_query(); /* Assembler accesses to CM registers */
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020097 /* Queries the SPD values */
Wolfgang Denk74f43042005-09-25 01:48:28 +020098
99 /* Obtain the SDRAM size from the CM SDRAM register */
100
101 cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200102 /* Register SDRAM size
103 *
104 * 0xXXXXXXbbb000bb 16 MB
105 * 0xXXXXXXbbb001bb 32 MB
106 * 0xXXXXXXbbb010bb 64 MB
107 * 0xXXXXXXbbb011bb 128 MB
108 * 0xXXXXXXbbb100bb 256 MB
109 *
Wolfgang Denk74f43042005-09-25 01:48:28 +0200110 */
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200111 sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
112 gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
Wolfgang Denk74f43042005-09-25 01:48:28 +0200113
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200114 }
Wolfgang Denk74f43042005-09-25 01:48:28 +0200115#endif /* CM_SPD_DETECT */
116
wdenk3d3befa2004-03-14 15:06:13 +0000117 return 0;
118}