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wdenkba56f622004-02-06 23:19:44 +00001/*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
wdenkba56f622004-02-06 23:19:44 +00005 */
6
Peter Tysere0299072009-07-17 19:01:07 -05007/*
wdenkba56f622004-02-06 23:19:44 +00008 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
Wolfgang Denk0c8721a2005-09-23 11:05:55 +020011 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
Peter Tysere0299072009-07-17 19:01:07 -050012 */
wdenkba56f622004-02-06 23:19:44 +000013
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
Peter Tysere0299072009-07-17 19:01:07 -050017/* High Level Configuration Options */
Peter Tyser10c1b212009-07-17 19:01:16 -050018#define CONFIG_XPEDITE1000 1
Peter Tyser54381b72009-07-17 19:01:15 -050019#define CONFIG_SYS_BOARD_NAME "XPedite1000"
John Schmoller92af65492010-10-22 00:20:24 -050020#define CONFIG_SYS_FORM_PMC 1
Peter Tysere0299072009-07-17 19:01:07 -050021#define CONFIG_4xx 1 /* ... PPC4xx family */
wdenkba56f622004-02-06 23:19:44 +000022#define CONFIG_440 1
Stefan Roese846b0dd2005-08-08 12:42:22 +020023#define CONFIG_440GX 1 /* 440 GX */
wdenk3c74e322004-02-22 23:46:08 +000024#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
wdenkba56f622004-02-06 23:19:44 +000025#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
26
Wolfgang Denk2ae18242010-10-06 09:05:45 +020027#define CONFIG_SYS_TEXT_BASE 0xFFF80000
28
Peter Tyser4cdad5f2009-07-17 19:01:13 -050029/*
30 * DDR config
31 */
32#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
33#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
34#define CONFIG_VERY_BIG_RAM 1
wdenkba56f622004-02-06 23:19:44 +000035
Peter Tysere0299072009-07-17 19:01:07 -050036/*
wdenkba56f622004-02-06 23:19:44 +000037 * Base addresses -- Note these are effective addresses where the
38 * actual resources get mapped (not physical addresses)
Peter Tysere0299072009-07-17 19:01:07 -050039 */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050040#define CONFIG_SYS_SDRAM_BASE 0x00000000
41#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020042#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050043#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050044#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
45#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Peter Tysere0299072009-07-17 19:01:07 -050046#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
47#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
wdenkba56f622004-02-06 23:19:44 +000048
Peter Tyser4cdad5f2009-07-17 19:01:13 -050049/*
50 * Diagnostics
51 */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -050052#define CONFIG_SYS_ALT_MEMTEST
Peter Tyser4cdad5f2009-07-17 19:01:13 -050053#define CONFIG_SYS_MEMTEST_START 0x0400000
54#define CONFIG_SYS_MEMTEST_END 0x0C00000
55
56/* POST support */
57#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
58 CONFIG_SYS_POST_I2C)
59
60/*
61 * LED support
62 */
Peter Tysere0299072009-07-17 19:01:07 -050063#define USR_LED0 0x00000080
64#define USR_LED1 0x00000100
65#define USR_LED2 0x00000200
66#define USR_LED3 0x00000400
wdenkba56f622004-02-06 23:19:44 +000067
68#ifndef __ASSEMBLY__
69extern unsigned long in32(unsigned int);
70extern void out32(unsigned int, unsigned long);
71
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
73#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
74#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
75#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
wdenkba56f622004-02-06 23:19:44 +000076
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
78#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
79#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
80#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
wdenkba56f622004-02-06 23:19:44 +000081#endif
82
Peter Tyser4cdad5f2009-07-17 19:01:13 -050083/*
84 * Use internal SRAM for initial stack
85 */
Peter Tysere0299072009-07-17 19:01:07 -050086#define CONFIG_SYS_TEMP_STACK_OCM 1
87#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
88#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
Wolfgang Denk553f0982010-10-26 13:32:32 +020089#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020090#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidman800eb092010-09-20 08:51:53 +020091#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
wdenkba56f622004-02-06 23:19:44 +000092
Peter Tyser9b4ef1f2009-07-17 19:01:14 -050093#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
94#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
wdenkba56f622004-02-06 23:19:44 +000095
Peter Tyser4cdad5f2009-07-17 19:01:13 -050096/*
97 * Serial Port
98 */
Stefan Roese550650d2010-09-20 16:05:31 +020099#define CONFIG_CONS_INDEX 1 /* Use UART0 */
100#define CONFIG_SYS_NS16550
101#define CONFIG_SYS_NS16550_SERIAL
102#define CONFIG_SYS_NS16550_REG_SIZE 1
103#define CONFIG_SYS_NS16550_CLK get_serial_clock()
104
Peter Tysere0299072009-07-17 19:01:07 -0500105#define CONFIG_SYS_BAUDRATE_TABLE \
106 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500107#define CONFIG_BAUDRATE 115200
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500108#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
109#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkba56f622004-02-06 23:19:44 +0000110
Peter Tysere0299072009-07-17 19:01:07 -0500111/*
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500112 * Use the HUSH parser
113 */
114#define CONFIG_SYS_HUSH_PARSER
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500115
116/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500117 * NOR flash configuration
Peter Tysere0299072009-07-17 19:01:07 -0500118 */
Peter Tyser42735812009-07-17 19:01:08 -0500119#define CONFIG_SYS_MAX_FLASH_BANKS 3
120#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
121#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
Peter Tyser11ad3092009-07-17 19:01:03 -0500122#define CONFIG_FLASH_CFI_DRIVER
123#define CONFIG_SYS_FLASH_CFI
124#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Peter Tyser42735812009-07-17 19:01:08 -0500125#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
Peter Tysere0299072009-07-17 19:01:07 -0500126#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
127#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkba56f622004-02-06 23:19:44 +0000128
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500129/*
130 * I2C
131 */
Dirk Eibach880540d2013-04-25 02:40:01 +0000132#define CONFIG_SYS_I2C
133#define CONFIG_SYS_I2C_PPC4XX
134#define CONFIG_SYS_I2C_PPC4XX_CH0
135#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
136#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
wdenkba56f622004-02-06 23:19:44 +0000137
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500138/* I2C EEPROM */
139#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
Peter Tysere0299072009-07-17 19:01:07 -0500140#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
141#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
142#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
wdenkba56f622004-02-06 23:19:44 +0000143
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500144/* I2C RTC: STMicro M41T00 */
145#define CONFIG_RTC_M41T11 1
146#define CONFIG_SYS_I2C_RTC_ADDR 0x68
147#define CONFIG_SYS_M41T11_BASE_YEAR 2000
wdenkba56f622004-02-06 23:19:44 +0000148
Peter Tysere0299072009-07-17 19:01:07 -0500149/*
150 * PCI
wdenkba56f622004-02-06 23:19:44 +0000151 */
152/* General PCI */
Peter Tysere0299072009-07-17 19:01:07 -0500153#define CONFIG_PCI /* include pci support */
Gabor Juhos842033e2013-05-30 07:06:12 +0000154#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Peter Tysere0299072009-07-17 19:01:07 -0500155#define CONFIG_PCI_PNP /* do pci plug-and-play */
156#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
157#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
wdenkba56f622004-02-06 23:19:44 +0000158
159/* Board-specific PCI */
Peter Tysere0299072009-07-17 19:01:07 -0500160#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
162#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
Peter Tysere0299072009-07-17 19:01:07 -0500163#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
164
wdenkba56f622004-02-06 23:19:44 +0000165/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500166 * Networking options
167 */
168#define CONFIG_PPC4xx_EMAC
169#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500170#define CONFIG_MII 1 /* MII PHY management */
171#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
172#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
173#define CONFIG_ETHPRIME "ppc_4xx_eth2"
174#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
175#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
176#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
177#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
178#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
179
180/* BOOTP options */
181#define CONFIG_BOOTP_BOOTFILESIZE
182#define CONFIG_BOOTP_BOOTPATH
183#define CONFIG_BOOTP_GATEWAY
184#define CONFIG_BOOTP_HOSTNAME
185
186/*
187 * Command configuration
188 */
189#include <config_cmd_default.h>
190
191#define CONFIG_CMD_ASKENV
192#define CONFIG_CMD_DATE
193#define CONFIG_CMD_DHCP
194#define CONFIG_CMD_EEPROM
195#define CONFIG_CMD_ELF
196#define CONFIG_CMD_FLASH
197#define CONFIG_CMD_I2C
198#define CONFIG_CMD_IRQ
199#define CONFIG_CMD_JFFS2
200#define CONFIG_CMD_MII
201#define CONFIG_CMD_NET
202#define CONFIG_CMD_PCI
203#define CONFIG_CMD_PING
204#define CONFIG_CMD_SAVEENV
205#define CONFIG_CMD_SNTP
206
207/*
208 * Miscellaneous configurable options
209 */
210#define CONFIG_SYS_LONGHELP /* undef to save memory */
211#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
212#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500213#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500214#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
215#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
216#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
217#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500218#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
219#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
220#define CONFIG_PANIC_HANG /* do not reset board on panic */
221#define CONFIG_PREBOOT /* enable preboot variable */
222#define CONFIG_FIT 1
223#define CONFIG_FIT_VERBOSE 1
224#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
225#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500226
227/*
wdenkba56f622004-02-06 23:19:44 +0000228 * For booting Linux, the board info and command line data
229 * have to be in the first 8 MB of memory, since this is
230 * the maximum mapped by the Linux kernel during initialization.
231 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkba56f622004-02-06 23:19:44 +0000233
234/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500235 * Environment Configuration
236 */
237#define CONFIG_ENV_IS_IN_FLASH 1
238#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
239#define CONFIG_ENV_SIZE 0x8000
240#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
241
242/*
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500243 * Flash memory map:
244 * fff80000 - ffffffff U-Boot (512 KB)
245 * fff40000 - fff7ffff U-Boot Environment (256 KB)
246 * fff00000 - fff3ffff FDT (256KB)
247 * ffc00000 - ffefffff OS image (3MB)
248 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
249 */
250
Marek Vasut5368c552012-09-23 17:41:24 +0200251#define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
252#define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
253#define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500254
255#define CONFIG_PROG_UBOOT \
256 "$download_cmd $loadaddr $ubootfile; " \
257 "if test $? -eq 0; then " \
258 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
259 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
260 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
261 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
262 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
263 "if test $? -ne 0; then " \
264 "echo PROGRAM FAILED; " \
265 "else; " \
266 "echo PROGRAM SUCCEEDED; " \
267 "fi; " \
268 "else; " \
269 "echo DOWNLOAD FAILED; " \
270 "fi;"
271
272#define CONFIG_BOOT_OS_NET \
273 "$download_cmd $osaddr $osfile; " \
274 "if test $? -eq 0; then " \
275 "if test -n $fdtaddr; then " \
276 "$download_cmd $fdtaddr $fdtfile; " \
277 "if test $? -eq 0; then " \
278 "bootm $osaddr - $fdtaddr; " \
279 "else; " \
280 "echo FDT DOWNLOAD FAILED; " \
281 "fi; " \
282 "else; " \
283 "bootm $osaddr; " \
284 "fi; " \
285 "else; " \
286 "echo OS DOWNLOAD FAILED; " \
287 "fi;"
288
289#define CONFIG_PROG_OS \
290 "$download_cmd $osaddr $osfile; " \
291 "if test $? -eq 0; then " \
292 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
293 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
294 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
295 "if test $? -ne 0; then " \
296 "echo OS PROGRAM FAILED; " \
297 "else; " \
298 "echo OS PROGRAM SUCCEEDED; " \
299 "fi; " \
300 "else; " \
301 "echo OS DOWNLOAD FAILED; " \
302 "fi;"
303
304#define CONFIG_PROG_FDT \
305 "$download_cmd $fdtaddr $fdtfile; " \
306 "if test $? -eq 0; then " \
307 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
308 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
309 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
310 "if test $? -ne 0; then " \
311 "echo FDT PROGRAM FAILED; " \
312 "else; " \
313 "echo FDT PROGRAM SUCCEEDED; " \
314 "fi; " \
315 "else; " \
316 "echo FDT DOWNLOAD FAILED; " \
317 "fi;"
318
319#define CONFIG_EXTRA_ENV_SETTINGS \
320 "autoload=yes\0" \
321 "download_cmd=tftp\0" \
322 "console_args=console=ttyS0,115200\0" \
323 "root_args=root=/dev/nfs rw\0" \
324 "misc_args=ip=on\0" \
325 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
326 "bootfile=/home/user/file\0" \
Peter Tyserc00ac252010-10-22 00:20:26 -0500327 "osfile=/home/user/board.uImage\0" \
328 "fdtfile=/home/user/board.dtb\0" \
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500329 "ubootfile=/home/user/u-boot.bin\0" \
330 "fdtaddr=c00000\0" \
331 "osaddr=0x1000000\0" \
332 "loadaddr=0x1000000\0" \
333 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
334 "prog_os="CONFIG_PROG_OS"\0" \
335 "prog_fdt="CONFIG_PROG_FDT"\0" \
336 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
337 "bootcmd_flash=run set_bootargs; " \
338 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
339 "bootcmd=run bootcmd_flash\0"
wdenkba56f622004-02-06 23:19:44 +0000340#endif /* __CONFIG_H */