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Tom Rix376aee72009-05-15 23:48:36 +02001/*
2 * (C) Copyright 2006-2009
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * Nishanth Menon <nm@ti.com>
7 * Tom Rix <Tom.Rix@windriver.com>
8 *
9 * Configuration settings for the TI OMAP3430 Zoom II board.
10 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020011 * SPDX-License-Identifier: GPL-2.0+
Tom Rix376aee72009-05-15 23:48:36 +020012 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
Tom Rix376aee72009-05-15 23:48:36 +020016
17/*
18 * High Level Configuration Options
19 */
Tom Rix376aee72009-05-15 23:48:36 +020020#define CONFIG_OMAP 1 /* in a TI OMAP core */
21#define CONFIG_OMAP34XX 1 /* which is a 34XX */
Tom Rix376aee72009-05-15 23:48:36 +020022#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */
Marek Vasut308252a2012-07-21 05:02:23 +000023#define CONFIG_OMAP_GPIO
Tom Rix376aee72009-05-15 23:48:36 +020024
Vaibhav Hiremathcae377b2010-06-07 15:20:34 -040025#define CONFIG_SDRC /* The chip has SDRC controller */
26
Tom Rix376aee72009-05-15 23:48:36 +020027#include <asm/arch/cpu.h> /* get chip and board defs */
28#include <asm/arch/omap3.h>
29
Dirk Behme3962c4f2009-05-31 12:44:41 +020030/*
31 * Display CPU and Board information
32 */
33#define CONFIG_DISPLAY_CPUINFO 1
34#define CONFIG_DISPLAY_BOARDINFO 1
35
Tom Rix376aee72009-05-15 23:48:36 +020036/* Clock Defines */
37#define V_OSCK 26000000 /* Clock output from T2 */
38#define V_SCLK (V_OSCK >> 1)
39
Tom Rix376aee72009-05-15 23:48:36 +020040#define CONFIG_MISC_INIT_R
41
42#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43#define CONFIG_SETUP_MEMORY_TAGS 1
44#define CONFIG_INITRD_TAG 1
45#define CONFIG_REVISION_TAG 1
46
Grant Likely2fa8ca92011-03-28 09:59:07 +000047#define CONFIG_OF_LIBFDT 1
48
Tom Rix376aee72009-05-15 23:48:36 +020049/*
50 * Size of malloc() pool
51 */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040052#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Tom Rix376aee72009-05-15 23:48:36 +020053 /* Sector */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040054#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Tom Rix376aee72009-05-15 23:48:36 +020055/*
56 * Hardware drivers
57 */
58
59/*
60 * NS16550 Configuration
Tom Rix660888b2009-05-31 12:44:37 +020061 * Zoom2 uses the TL16CP754C on the debug board
Tom Rix376aee72009-05-15 23:48:36 +020062 */
Tom Rix660888b2009-05-31 12:44:37 +020063/*
64 * 0 - 1 : first USB with respect to the left edge of the debug board
65 * 2 - 3 : second USB with respect to the left edge of the debug board
66 */
Marek Vasut425101e2012-09-12 20:15:06 +020067#define ZOOM2_DEFAULT_SERIAL_DEVICE 0
Tom Rix660888b2009-05-31 12:44:37 +020068
69#define V_NS16550_CLK (1843200) /* 1.8432 Mhz */
Tom Rix376aee72009-05-15 23:48:36 +020070
71#define CONFIG_SYS_NS16550
Tom Rix660888b2009-05-31 12:44:37 +020072#define CONFIG_SYS_NS16550_REG_SIZE (-2)
Tom Rix376aee72009-05-15 23:48:36 +020073#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Tom Rix660888b2009-05-31 12:44:37 +020074#define CONFIG_BAUDRATE 115200
75#define CONFIG_SYS_BAUDRATE_TABLE {115200}
Tom Rix376aee72009-05-15 23:48:36 +020076
77/* allow to overwrite serial and ethaddr */
78#define CONFIG_ENV_OVERWRITE
Tom Rix660888b2009-05-31 12:44:37 +020079
Tom Rinicfc43842011-09-03 21:51:00 -040080#define CONFIG_GENERIC_MMC 1
Tom Rix376aee72009-05-15 23:48:36 +020081#define CONFIG_MMC 1
Tom Rinicfc43842011-09-03 21:51:00 -040082#define CONFIG_OMAP_HSMMC 1
Tom Rix376aee72009-05-15 23:48:36 +020083#define CONFIG_DOS_PARTITION 1
84
Tom Rix83ae6982009-05-31 12:44:39 +020085/* Status LED */
86#define CONFIG_STATUS_LED 1 /* Status LED enabled */
87#define CONFIG_BOARD_SPECIFIC_LED 1
88#define STATUS_LED_BLUE 0
89#define STATUS_LED_RED 1
90/* Blue */
91#define STATUS_LED_BIT STATUS_LED_BLUE
92#define STATUS_LED_STATE STATUS_LED_ON
93#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
94/* Red */
95#define STATUS_LED_BIT1 STATUS_LED_RED
96#define STATUS_LED_STATE1 STATUS_LED_OFF
97#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
98/* Optional value */
99#define STATUS_LED_BOOT STATUS_LED_BIT
100
Tom Rix0c9520e2009-05-29 18:57:32 -0500101/* GPIO banks */
102#ifdef CONFIG_STATUS_LED
103#define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
104#define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
105#endif
106#define CONFIG_OMAP3_GPIO_3 /* board revision */
107#define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
108
Tom Rix2ec1abe2009-10-31 12:37:45 -0500109/* USB */
110#define CONFIG_MUSB_UDC 1
111#define CONFIG_USB_OMAP3 1
112#define CONFIG_TWL4030_USB 1
113
114/* USB device configuration */
115#define CONFIG_USB_DEVICE 1
116#define CONFIG_USB_TTY 1
117/* Change these to suit your needs */
118#define CONFIG_USBD_VENDORID 0x0451
119#define CONFIG_USBD_PRODUCTID 0x5678
120#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
121#define CONFIG_USBD_PRODUCT_NAME "Zoom2"
122
Tom Rix376aee72009-05-15 23:48:36 +0200123/* commands to include */
124#include <config_cmd_default.h>
125
126#define CONFIG_CMD_FAT /* FAT support */
127#define CONFIG_CMD_I2C /* I2C serial bus support */
128#define CONFIG_CMD_MMC /* MMC support */
129#define CONFIG_CMD_NAND /* NAND support */
130#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
131
132#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
133#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
134#undef CONFIG_CMD_IMI /* iminfo */
135#undef CONFIG_CMD_IMLS /* List all found images */
136#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
137#undef CONFIG_CMD_NFS /* NFS support */
138
139#define CONFIG_SYS_NO_FLASH
Tom Rix0297ec72009-09-29 10:19:49 -0400140#define CONFIG_HARD_I2C 1
Tom Rix376aee72009-05-15 23:48:36 +0200141#define CONFIG_SYS_I2C_SPEED 100000
142#define CONFIG_SYS_I2C_SLAVE 1
Tom Rix376aee72009-05-15 23:48:36 +0200143#define CONFIG_DRIVER_OMAP34XX_I2C 1
144
145/*
Tom Rixcd782632009-06-28 12:52:29 -0500146 * TWL4030
147 */
148#define CONFIG_TWL4030_POWER 1
Tom Rix2c155132009-06-28 12:52:30 -0500149#define CONFIG_TWL4030_LED 1
Tom Rixcd782632009-06-28 12:52:29 -0500150
151/*
Tom Rix376aee72009-05-15 23:48:36 +0200152 * Board NAND Info.
153 */
154#define CONFIG_NAND_OMAP_GPMC
155#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
156 /* to access nand */
157#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
158 /* to access nand at */
159 /* CS0 */
160#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
161#define CONFIG_SYS_MAX_NAND_DEVICE 1
162
Tom Rix376aee72009-05-15 23:48:36 +0200163/* Environment information */
164#define CONFIG_BOOTDELAY 10
165
Tom Rix2ec1abe2009-10-31 12:37:45 -0500166#define CONFIG_EXTRA_ENV_SETTINGS \
167 "usbtty=cdc_acm\0" \
168
Dirk Behme998f4ca2010-11-30 11:10:48 -0500169#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
170#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
171#define CONFIG_SYS_INIT_RAM_SIZE 0x800
172#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
173 CONFIG_SYS_INIT_RAM_SIZE - \
174 GENERATED_GBL_DATA_SIZE)
Tom Rix376aee72009-05-15 23:48:36 +0200175/*
176 * Miscellaneous configurable options
177 */
178
179#define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # "
180#define CONFIG_SYS_LONGHELP
Vaibhav Hiremathf62b1252011-09-03 21:24:19 -0400181#define CONFIG_SYS_CBSIZE 512
Tom Rix376aee72009-05-15 23:48:36 +0200182#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
183 sizeof(CONFIG_SYS_PROMPT) + 16)
184#define CONFIG_SYS_MAXARGS 16
185#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
186/* Memtest from start of memory to 31MB */
187#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
188#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)
189/* The default load address is the start of memory */
190#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
191/* everything, incl board info, in Hz */
192#undef CONFIG_SYS_CLKS_IN_HZ
193/*
194 * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
195 * 32KHz clk, or from external sig. This rate is divided by a local divisor.
196 */
197#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
198#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
199#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
200
201/*-----------------------------------------------------------------------
Tom Rix376aee72009-05-15 23:48:36 +0200202 * Physical Memory Map
203 */
204#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
205#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Tom Rix376aee72009-05-15 23:48:36 +0200206#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
207
Tom Rix376aee72009-05-15 23:48:36 +0200208/*-----------------------------------------------------------------------
209 * FLASH and environment organization
210 */
211
212/* **** PISMO SUPPORT *** */
213
214/* Configure the PISMO */
215#define PISMO1_NAND_SIZE GPMC_SIZE_128M
216#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
217
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400218#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Tom Rix376aee72009-05-15 23:48:36 +0200219
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400220#if defined(CONFIG_CMD_NAND)
221#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
222#endif
Tom Rix376aee72009-05-15 23:48:36 +0200223
224/* Monitor at start of flash */
225#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
226
227#define CONFIG_ENV_IS_IN_NAND 1
228#define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */
229
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400230#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
231#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Tom Rix376aee72009-05-15 23:48:36 +0200232#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
233
Aneesh V8e408522011-11-21 23:38:59 +0000234#define CONFIG_SYS_CACHELINE_SIZE 64
235
Tom Rix376aee72009-05-15 23:48:36 +0200236#endif /* __CONFIG_H */