Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * TQM8349 board configuration file |
| 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 15 | /* |
| 16 | * High Level Configuration Options |
| 17 | */ |
| 18 | #define CONFIG_E300 1 /* E300 Family */ |
Peter Tyser | 0f89860 | 2009-05-22 17:23:24 -0500 | [diff] [blame] | 19 | #define CONFIG_MPC83xx 1 /* MPC83xx family */ |
Peter Tyser | 2c7920a | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 20 | #define CONFIG_MPC834x 1 /* MPC834x specific */ |
Timur Tabi | 9ca880a | 2006-10-31 21:23:16 -0600 | [diff] [blame] | 21 | #define CONFIG_MPC8349 1 /* MPC8349 specific */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 22 | #define CONFIG_TQM834X 1 /* TQM834X board specific */ |
| 23 | |
Wolfgang Denk | 2ae1824 | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 24 | #define CONFIG_SYS_TEXT_BASE 0x80000000 |
| 25 | |
Mike Williams | 1626308 | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 26 | /* IMMR Base Address Register, use Freescale default: 0xff400000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 27 | #define CONFIG_SYS_IMMR 0xff400000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 28 | |
| 29 | /* System clock. Primary input clock when in PCI host mode */ |
| 30 | #define CONFIG_83XX_CLKIN 66666000 /* 66,666 MHz */ |
| 31 | |
| 32 | /* |
| 33 | * Local Bus LCRR |
| 34 | * LCRR: DLL bypass, Clock divider is 8 |
| 35 | * |
| 36 | * for CSB = 266 MHz it gives LCB clock frequency = 33 MHz |
| 37 | * |
| 38 | * External Local Bus rate is |
| 39 | * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV |
| 40 | */ |
Kim Phillips | c7190f0 | 2009-09-25 18:19:44 -0500 | [diff] [blame] | 41 | #define CONFIG_SYS_LCRR_DBYP LCRR_DBYP |
| 42 | #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 43 | |
| 44 | /* board pre init: do not call, nothing to do */ |
| 45 | #undef CONFIG_BOARD_EARLY_INIT_F |
| 46 | |
| 47 | /* detect the number of flash banks */ |
| 48 | #define CONFIG_BOARD_EARLY_INIT_R |
| 49 | |
| 50 | /* |
| 51 | * DDR Setup |
| 52 | */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 53 | /* DDR is system memory*/ |
| 54 | #define CONFIG_SYS_DDR_BASE 0x00000000 |
| 55 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 56 | #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 57 | #define DDR_CASLAT_25 /* CASLAT set to 2.5 */ |
| 58 | #undef CONFIG_DDR_ECC /* only for ECC DDR module */ |
| 59 | #undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 60 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 61 | #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 62 | #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ |
| 63 | #define CONFIG_SYS_MEMTEST_END 0x00100000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 64 | |
| 65 | /* |
| 66 | * FLASH on the Local Bus |
| 67 | */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 68 | #define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ |
| 69 | #define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 70 | #undef CONFIG_SYS_FLASH_CHECKSUM |
| 71 | #define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */ |
| 72 | #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 73 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */ |
Wolfgang Denk | a3455c0 | 2009-05-15 09:19:52 +0200 | [diff] [blame] | 74 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 75 | |
| 76 | /* |
| 77 | * FLASH bank number detection |
| 78 | */ |
| 79 | |
| 80 | /* |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 81 | * When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, the actual number of |
| 82 | * Flash banks has to be determined at runtime and stored in a gloabl variable |
| 83 | * tqm834x_num_flash_banks. The value of CONFIG_SYS_MAX_FLASH_BANKS_DETECT is |
| 84 | * only used instead of CONFIG_SYS_MAX_FLASH_BANKS to allocate the array |
| 85 | * flash_info, and should be made sufficiently large to accomodate the number |
| 86 | * of banks that might actually be detected. Since most (all?) Flash related |
| 87 | * functions use CONFIG_SYS_MAX_FLASH_BANKS as the number of actual banks on |
| 88 | * the board, it is defined as tqm834x_num_flash_banks. |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 89 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 91 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 92 | #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 93 | |
| 94 | /* 32 bit device at 0x80000000 via GPCM (0x8000_1801) */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 95 | #define CONFIG_SYS_BR0_PRELIM ((CONFIG_SYS_FLASH_BASE & BR_BA) \ |
| 96 | | BR_MS_GPCM \ |
| 97 | | BR_PS_32 \ |
| 98 | | BR_V) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 99 | |
| 100 | /* FLASH timing (0x0000_0c54) */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 101 | #define CONFIG_SYS_OR_TIMING_FLASH (OR_GPCM_CSNT \ |
| 102 | | OR_GPCM_ACS_DIV4 \ |
| 103 | | OR_GPCM_SCY_5 \ |
| 104 | | OR_GPCM_TRLX) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 105 | |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 106 | #define CONFIG_SYS_PRELIM_OR_AM OR_AM_1GB /* OR addr mask: 1 GiB */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 107 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 108 | #define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM \ |
| 109 | | CONFIG_SYS_OR_TIMING_FLASH) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 110 | |
Joe Hershberger | 7d6a098 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 111 | #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_1GB) |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 112 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 113 | /* Window base at flash base */ |
| 114 | #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 115 | |
| 116 | /* disable remaining mappings */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_BR1_PRELIM 0x00000000 |
| 118 | #define CONFIG_SYS_OR1_PRELIM 0x00000000 |
| 119 | #define CONFIG_SYS_LBLAWBAR1_PRELIM 0x00000000 |
| 120 | #define CONFIG_SYS_LBLAWAR1_PRELIM 0x00000000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 121 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_BR2_PRELIM 0x00000000 |
| 123 | #define CONFIG_SYS_OR2_PRELIM 0x00000000 |
| 124 | #define CONFIG_SYS_LBLAWBAR2_PRELIM 0x00000000 |
| 125 | #define CONFIG_SYS_LBLAWAR2_PRELIM 0x00000000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 126 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_BR3_PRELIM 0x00000000 |
| 128 | #define CONFIG_SYS_OR3_PRELIM 0x00000000 |
| 129 | #define CONFIG_SYS_LBLAWBAR3_PRELIM 0x00000000 |
| 130 | #define CONFIG_SYS_LBLAWAR3_PRELIM 0x00000000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 131 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 132 | /* |
| 133 | * Monitor config |
| 134 | */ |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 135 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 136 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 138 | # define CONFIG_SYS_RAMBOOT |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 139 | #else |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 140 | # undef CONFIG_SYS_RAMBOOT |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 141 | #endif |
| 142 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #define CONFIG_SYS_INIT_RAM_LOCK 1 |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 144 | #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ |
| 145 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 146 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 147 | #define CONFIG_SYS_GBL_DATA_OFFSET \ |
| 148 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 150 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 151 | /* Reserve 384 kB = 3 sect. for Mon */ |
| 152 | #define CONFIG_SYS_MONITOR_LEN (384 * 1024) |
| 153 | /* Reserve 512 kB for malloc */ |
| 154 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 155 | |
| 156 | /* |
| 157 | * Serial Port |
| 158 | */ |
| 159 | #define CONFIG_CONS_INDEX 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | #define CONFIG_SYS_NS16550 |
| 161 | #define CONFIG_SYS_NS16550_SERIAL |
| 162 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 163 | #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 164 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 165 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 166 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 167 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 168 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500) |
| 169 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 170 | |
| 171 | /* |
| 172 | * I2C |
| 173 | */ |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_I2C |
| 175 | #define CONFIG_SYS_I2C_FSL |
| 176 | #define CONFIG_SYS_FSL_I2C_SPEED 400000 |
| 177 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 178 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 179 | |
| 180 | /* I2C EEPROM, configuration for onboard EEPROMs 24C256 and 24C32 */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 181 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */ |
| 182 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit */ |
| 183 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32 bytes/write */ |
| 184 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */ |
| 185 | #define CONFIG_SYS_I2C_MULTI_EEPROMS /* more than one eeprom */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 186 | |
| 187 | /* I2C RTC */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 188 | #define CONFIG_RTC_DS1337 /* use ds1337 rtc via i2c */ |
| 189 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 190 | |
| 191 | /* I2C SYSMON (LM75) */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 192 | #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ |
| 193 | #define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 194 | #define CONFIG_SYS_DTT_MAX_TEMP 70 |
| 195 | #define CONFIG_SYS_DTT_LOW_TEMP -30 |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 196 | #define CONFIG_SYS_DTT_HYSTERESIS 3 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 197 | |
| 198 | /* |
| 199 | * TSEC |
| 200 | */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 201 | #define CONFIG_TSEC_ENET /* tsec ethernet support */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 202 | #define CONFIG_MII |
| 203 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 204 | #define CONFIG_SYS_TSEC1_OFFSET 0x24000 |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 205 | #define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 206 | #define CONFIG_SYS_TSEC2_OFFSET 0x25000 |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 207 | #define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC2_OFFSET) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 208 | |
| 209 | #if defined(CONFIG_TSEC_ENET) |
| 210 | |
Kim Phillips | 255a3577 | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 211 | #define CONFIG_TSEC1 1 |
| 212 | #define CONFIG_TSEC1_NAME "TSEC0" |
| 213 | #define CONFIG_TSEC2 1 |
| 214 | #define CONFIG_TSEC2_NAME "TSEC1" |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 215 | #define TSEC1_PHY_ADDR 2 |
| 216 | #define TSEC2_PHY_ADDR 1 |
| 217 | #define TSEC1_PHYIDX 0 |
| 218 | #define TSEC2_PHYIDX 0 |
Andy Fleming | 3a79013 | 2007-08-15 20:03:25 -0500 | [diff] [blame] | 219 | #define TSEC1_FLAGS TSEC_GIGABIT |
| 220 | #define TSEC2_FLAGS TSEC_GIGABIT |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 221 | |
| 222 | /* Options are: TSEC[0-1] */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 223 | #define CONFIG_ETHPRIME "TSEC0" |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 224 | |
| 225 | #endif /* CONFIG_TSEC_ENET */ |
| 226 | |
| 227 | /* |
| 228 | * General PCI |
| 229 | * Addresses are mapped 1-1. |
| 230 | */ |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 231 | #define CONFIG_PCI |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 232 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 233 | #if defined(CONFIG_PCI) |
| 234 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 235 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
| 236 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 237 | |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 238 | /* PCI1 host bridge */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 239 | #define CONFIG_SYS_PCI1_MEM_BASE 0x90000000 |
| 240 | #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE |
| 241 | #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ |
| 242 | #define CONFIG_SYS_PCI1_MMIO_BASE \ |
| 243 | (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) |
| 244 | #define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE |
| 245 | #define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ |
| 246 | #define CONFIG_SYS_PCI1_IO_BASE 0xe2000000 |
| 247 | #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE |
| 248 | #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 249 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 250 | #undef CONFIG_EEPRO100 |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 251 | #define CONFIG_EEPRO100 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 252 | #undef CONFIG_TULIP |
| 253 | |
| 254 | #if !defined(CONFIG_PCI_PNP) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 255 | #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BASE |
| 256 | #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_MEM_BASE |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 257 | #define PCI_IDSEL_NUMBER 0x1c /* slot0 (IDSEL) = 28 */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 258 | #endif |
| 259 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 260 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 261 | |
| 262 | #endif /* CONFIG_PCI */ |
| 263 | |
| 264 | /* |
| 265 | * Environment |
| 266 | */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 267 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 268 | #define CONFIG_ENV_ADDR \ |
| 269 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
| 270 | #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) for env */ |
| 271 | #define CONFIG_ENV_SIZE 0x8000 /* 32K max size */ |
Wolfgang Denk | 929b79a | 2009-05-14 23:18:33 +0200 | [diff] [blame] | 272 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) |
| 273 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
| 274 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 275 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
| 276 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 277 | |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 278 | /* |
Jon Loeliger | a1aa0bb | 2007-07-10 09:22:23 -0500 | [diff] [blame] | 279 | * BOOTP options |
| 280 | */ |
| 281 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 282 | #define CONFIG_BOOTP_BOOTPATH |
| 283 | #define CONFIG_BOOTP_GATEWAY |
| 284 | #define CONFIG_BOOTP_HOSTNAME |
| 285 | |
| 286 | |
| 287 | /* |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 288 | * Command line configuration. |
| 289 | */ |
| 290 | #include <config_cmd_default.h> |
| 291 | |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 292 | #define CONFIG_CMD_ASKENV |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 293 | #define CONFIG_CMD_DATE |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 294 | #define CONFIG_CMD_DHCP |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 295 | #define CONFIG_CMD_DTT |
| 296 | #define CONFIG_CMD_EEPROM |
| 297 | #define CONFIG_CMD_I2C |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 298 | #define CONFIG_CMD_NFS |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 299 | #define CONFIG_CMD_JFFS2 |
| 300 | #define CONFIG_CMD_MII |
| 301 | #define CONFIG_CMD_PING |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 302 | #define CONFIG_CMD_REGINFO |
| 303 | #define CONFIG_CMD_SNTP |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 304 | |
| 305 | #if defined(CONFIG_PCI) |
| 306 | #define CONFIG_CMD_PCI |
| 307 | #endif |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 308 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 309 | #if defined(CONFIG_SYS_RAMBOOT) |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 310 | #undef CONFIG_CMD_SAVEENV |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 311 | #undef CONFIG_CMD_LOADS |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 312 | #endif |
| 313 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 314 | /* |
| 315 | * Miscellaneous configurable options |
| 316 | */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 317 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 318 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
| 319 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 320 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 321 | #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ |
| 322 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ |
Kim Phillips | a059e90 | 2010-04-15 17:36:05 -0500 | [diff] [blame] | 323 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 324 | #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */ |
Wolfgang Denk | 2751a95 | 2006-10-28 02:29:14 +0200 | [diff] [blame] | 325 | |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 326 | #if defined(CONFIG_CMD_KGDB) |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 327 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 328 | #else |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 329 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 330 | #endif |
| 331 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 332 | /* Print Buffer Size */ |
| 333 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 334 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 335 | /* Boot Argument Buffer Size */ |
| 336 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 337 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 338 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 339 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 340 | |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 341 | /* pass open firmware flat tree */ |
| 342 | #define CONFIG_OF_LIBFDT 1 |
| 343 | #define CONFIG_OF_BOARD_SETUP 1 |
| 344 | #define CONFIG_OF_STDOUT_VIA_ALIAS 1 |
| 345 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 346 | /* |
| 347 | * For booting Linux, the board info and command line data |
Ira W. Snyder | 9f530d5 | 2010-09-10 15:42:32 -0700 | [diff] [blame] | 348 | * have to be in the first 256 MB of memory, since this is |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 349 | * the maximum mapped by the Linux kernel during initialization. |
| 350 | */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 351 | /* Initial Memory map for Linux */ |
| 352 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 353 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 354 | #define CONFIG_SYS_HRCW_LOW (\ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 355 | HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ |
| 356 | HRCWL_DDR_TO_SCB_CLK_1X1 |\ |
| 357 | HRCWL_CSB_TO_CLKIN_4X1 |\ |
| 358 | HRCWL_VCO_1X2 |\ |
| 359 | HRCWL_CORE_TO_CSB_2X1) |
| 360 | |
| 361 | #if defined(PCI_64BIT) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 362 | #define CONFIG_SYS_HRCW_HIGH (\ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 363 | HRCWH_PCI_HOST |\ |
| 364 | HRCWH_64_BIT_PCI |\ |
| 365 | HRCWH_PCI1_ARBITER_ENABLE |\ |
| 366 | HRCWH_PCI2_ARBITER_DISABLE |\ |
| 367 | HRCWH_CORE_ENABLE |\ |
| 368 | HRCWH_FROM_0X00000100 |\ |
| 369 | HRCWH_BOOTSEQ_DISABLE |\ |
| 370 | HRCWH_SW_WATCHDOG_DISABLE |\ |
| 371 | HRCWH_ROM_LOC_LOCAL_16BIT |\ |
| 372 | HRCWH_TSEC1M_IN_GMII |\ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 373 | HRCWH_TSEC2M_IN_GMII) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 374 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 375 | #define CONFIG_SYS_HRCW_HIGH (\ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 376 | HRCWH_PCI_HOST |\ |
| 377 | HRCWH_32_BIT_PCI |\ |
| 378 | HRCWH_PCI1_ARBITER_ENABLE |\ |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 379 | HRCWH_PCI2_ARBITER_DISABLE |\ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 380 | HRCWH_CORE_ENABLE |\ |
| 381 | HRCWH_FROM_0X00000100 |\ |
| 382 | HRCWH_BOOTSEQ_DISABLE |\ |
| 383 | HRCWH_SW_WATCHDOG_DISABLE |\ |
| 384 | HRCWH_ROM_LOC_LOCAL_16BIT |\ |
| 385 | HRCWH_TSEC1M_IN_GMII |\ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 386 | HRCWH_TSEC2M_IN_GMII) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 387 | #endif |
| 388 | |
Kumar Gala | 9260a56 | 2006-01-11 11:12:57 -0600 | [diff] [blame] | 389 | /* System IO Config */ |
Kim Phillips | 3c9b1ee | 2009-06-05 14:11:33 -0500 | [diff] [blame] | 390 | #define CONFIG_SYS_SICRH 0 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 391 | #define CONFIG_SYS_SICRL SICRL_LDP_A |
Kumar Gala | 9260a56 | 2006-01-11 11:12:57 -0600 | [diff] [blame] | 392 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 393 | /* i-cache and d-cache disabled */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 394 | #define CONFIG_SYS_HID0_INIT 0x000000000 |
Kim Phillips | 1a2e203 | 2010-04-20 19:37:54 -0500 | [diff] [blame] | 395 | #define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ |
| 396 | HID0_ENABLE_INSTRUCTION_CACHE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 397 | #define CONFIG_SYS_HID2 HID2_HBE |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 398 | |
Becky Bruce | 31d8267 | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 399 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 400 | |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 401 | /* DDR 0 - 512M */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 402 | #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 403 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 404 | | BATL_MEMCOHERENCE) |
| 405 | #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ |
| 406 | | BATU_BL_256M \ |
| 407 | | BATU_VS \ |
| 408 | | BATU_VP) |
| 409 | #define CONFIG_SYS_IBAT1L (CONFIG_SYS_SDRAM_BASE + 0x10000000 \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 410 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 411 | | BATL_MEMCOHERENCE) |
| 412 | #define CONFIG_SYS_IBAT1U (CONFIG_SYS_SDRAM_BASE + 0x10000000 \ |
| 413 | | BATU_BL_256M \ |
| 414 | | BATU_VS \ |
| 415 | | BATU_VP) |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 416 | |
| 417 | /* stack in DCACHE @ 512M (no backing mem) */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 418 | #define CONFIG_SYS_IBAT2L (CONFIG_SYS_INIT_RAM_ADDR \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 419 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 420 | | BATL_MEMCOHERENCE) |
| 421 | #define CONFIG_SYS_IBAT2U (CONFIG_SYS_INIT_RAM_ADDR \ |
| 422 | | BATU_BL_128K \ |
| 423 | | BATU_VS \ |
| 424 | | BATU_VP) |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 425 | |
| 426 | /* PCI */ |
Rafal Jaworowski | 6fe16a8 | 2006-08-18 10:39:11 +0200 | [diff] [blame] | 427 | #ifdef CONFIG_PCI |
Gabor Juhos | 842033e | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 428 | #define CONFIG_PCI_INDIRECT_BRIDGE |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 429 | #define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 430 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 431 | | BATL_MEMCOHERENCE) |
| 432 | #define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE \ |
| 433 | | BATU_BL_256M \ |
| 434 | | BATU_VS \ |
| 435 | | BATU_VP) |
| 436 | #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MMIO_BASE \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 437 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 438 | | BATL_MEMCOHERENCE \ |
| 439 | | BATL_GUARDEDSTORAGE) |
| 440 | #define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MMIO_BASE \ |
| 441 | | BATU_BL_256M \ |
| 442 | | BATU_VS \ |
| 443 | | BATU_VP) |
| 444 | #define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_IO_BASE \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 445 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 446 | | BATL_CACHEINHIBIT \ |
| 447 | | BATL_GUARDEDSTORAGE) |
| 448 | #define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE \ |
| 449 | | BATU_BL_16M \ |
| 450 | | BATU_VS \ |
| 451 | | BATU_VP) |
Rafal Jaworowski | 6fe16a8 | 2006-08-18 10:39:11 +0200 | [diff] [blame] | 452 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 453 | #define CONFIG_SYS_IBAT3L (0) |
| 454 | #define CONFIG_SYS_IBAT3U (0) |
| 455 | #define CONFIG_SYS_IBAT4L (0) |
| 456 | #define CONFIG_SYS_IBAT4U (0) |
| 457 | #define CONFIG_SYS_IBAT5L (0) |
| 458 | #define CONFIG_SYS_IBAT5U (0) |
Rafal Jaworowski | 6fe16a8 | 2006-08-18 10:39:11 +0200 | [diff] [blame] | 459 | #endif |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 460 | |
| 461 | /* IMMRBAR */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 462 | #define CONFIG_SYS_IBAT6L (CONFIG_SYS_IMMR \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 463 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 464 | | BATL_CACHEINHIBIT \ |
| 465 | | BATL_GUARDEDSTORAGE) |
| 466 | #define CONFIG_SYS_IBAT6U (CONFIG_SYS_IMMR \ |
| 467 | | BATU_BL_1M \ |
| 468 | | BATU_VS \ |
| 469 | | BATU_VP) |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 470 | |
| 471 | /* FLASH */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 472 | #define CONFIG_SYS_IBAT7L (CONFIG_SYS_FLASH_BASE \ |
Joe Hershberger | 72cd408 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 473 | | BATL_PP_RW \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 474 | | BATL_CACHEINHIBIT \ |
| 475 | | BATL_GUARDEDSTORAGE) |
| 476 | #define CONFIG_SYS_IBAT7U (CONFIG_SYS_FLASH_BASE \ |
| 477 | | BATU_BL_256M \ |
| 478 | | BATU_VS \ |
| 479 | | BATU_VP) |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 480 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 481 | #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L |
| 482 | #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U |
| 483 | #define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L |
| 484 | #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U |
| 485 | #define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L |
| 486 | #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U |
| 487 | #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L |
| 488 | #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U |
| 489 | #define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L |
| 490 | #define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U |
| 491 | #define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L |
| 492 | #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U |
| 493 | #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L |
| 494 | #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U |
| 495 | #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L |
| 496 | #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U |
Kumar Gala | 2688e2f | 2006-02-10 15:40:06 -0600 | [diff] [blame] | 497 | |
Jon Loeliger | 2694690 | 2007-07-04 22:30:50 -0500 | [diff] [blame] | 498 | #if defined(CONFIG_CMD_KGDB) |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 499 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ |
| 500 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| 501 | #endif |
| 502 | |
| 503 | /* |
| 504 | * Environment Configuration |
| 505 | */ |
| 506 | |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 507 | /* default location for tftp and bootm */ |
| 508 | #define CONFIG_LOADADDR 400000 |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 509 | |
| 510 | #define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 511 | #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 512 | |
| 513 | #define CONFIG_BAUDRATE 115200 |
| 514 | |
| 515 | #define CONFIG_PREBOOT "echo;" \ |
Wolfgang Denk | 32bf3d1 | 2008-03-03 12:16:44 +0100 | [diff] [blame] | 516 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 517 | "echo" |
| 518 | |
| 519 | #undef CONFIG_BOOTARGS |
| 520 | |
| 521 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 522 | "netdev=eth0\0" \ |
Wolfgang Denk | b931b3a | 2008-02-14 23:18:01 +0100 | [diff] [blame] | 523 | "hostname=tqm834x\0" \ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 524 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 525 | "nfsroot=${serverip}:${rootpath}\0" \ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 526 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 527 | "addip=setenv bootargs ${bootargs} " \ |
| 528 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 529 | ":${hostname}:${netdev}:off panic=1\0" \ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 530 | "addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 531 | "flash_nfs_old=run nfsargs addip addcons;" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 532 | "bootm ${kernel_addr}\0" \ |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 533 | "flash_nfs=run nfsargs addip addcons;" \ |
| 534 | "bootm ${kernel_addr} - ${fdt_addr}\0" \ |
| 535 | "flash_self_old=run ramargs addip addcons;" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 536 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 537 | "flash_self=run ramargs addip addcons;" \ |
| 538 | "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ |
| 539 | "net_nfs_old=tftp 400000 ${bootfile};" \ |
| 540 | "run nfsargs addip addcons;bootm\0" \ |
| 541 | "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ |
| 542 | "tftp ${fdt_addr_r} ${fdt_file}; " \ |
| 543 | "run nfsargs addip addcons; " \ |
| 544 | "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 545 | "rootpath=/opt/eldk/ppc_6xx\0" \ |
Wolfgang Denk | 4681e67 | 2009-05-14 23:18:34 +0200 | [diff] [blame] | 546 | "bootfile=tqm834x/uImage\0" \ |
| 547 | "fdtfile=tqm834x/tqm834x.dtb\0" \ |
| 548 | "kernel_addr_r=400000\0" \ |
| 549 | "fdt_addr_r=600000\0" \ |
| 550 | "ramdisk_addr_r=800000\0" \ |
| 551 | "kernel_addr=800C0000\0" \ |
| 552 | "fdt_addr=800A0000\0" \ |
| 553 | "ramdisk_addr=80300000\0" \ |
| 554 | "u-boot=tqm834x/u-boot.bin\0" \ |
| 555 | "load=tftp 200000 ${u-boot}\0" \ |
| 556 | "update=protect off 80000000 +${filesize};" \ |
| 557 | "era 80000000 +${filesize};" \ |
| 558 | "cp.b 200000 80000000 ${filesize}\0" \ |
Detlev Zundel | d8ab58b | 2008-03-06 16:45:53 +0100 | [diff] [blame] | 559 | "upd=run load update\0" \ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 560 | "" |
| 561 | |
| 562 | #define CONFIG_BOOTCOMMAND "run flash_self" |
| 563 | |
| 564 | /* |
| 565 | * JFFS2 partitions |
| 566 | */ |
| 567 | /* mtdparts command line support */ |
Stefan Roese | 68d7d65 | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 568 | #define CONFIG_CMD_MTDPARTS |
Stefan Roese | 942556a | 2009-05-12 14:32:58 +0200 | [diff] [blame] | 569 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 570 | #define CONFIG_FLASH_CFI_MTD |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 571 | #define MTDIDS_DEFAULT "nor0=TQM834x-0" |
| 572 | |
| 573 | /* default mtd partition table */ |
Joe Hershberger | df939e1 | 2011-10-11 23:57:22 -0500 | [diff] [blame] | 574 | #define MTDPARTS_DEFAULT "mtdparts=TQM834x-0:256k(u-boot),256k(env)," \ |
| 575 | "1m(kernel),2m(initrd)," \ |
| 576 | "-(user);" \ |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 577 | |
| 578 | #endif /* __CONFIG_H */ |