Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2006-2008 |
| 3 | * Texas Instruments. |
| 4 | * Richard Woodruff <r-woodruff2@ti.com> |
| 5 | * Syed Mohammed Khasim <x0khasim@ti.com> |
| 6 | * |
| 7 | * Configuration settings for the TI OMAP3530 Beagle board. |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * High Level Configuration Options |
| 33 | */ |
| 34 | #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ |
| 35 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 36 | #define CONFIG_OMAP34XX 1 /* which is a 34XX */ |
| 37 | #define CONFIG_OMAP3430 1 /* which is in a 3430 */ |
| 38 | #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ |
| 39 | |
| 40 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 41 | #include <asm/arch/omap3.h> |
| 42 | |
Sanjeev Premi | 6a6b62e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 43 | /* |
| 44 | * Display CPU and Board information |
| 45 | */ |
| 46 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 47 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 48 | |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 49 | /* Clock Defines */ |
| 50 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 51 | #define V_SCLK (V_OSCK >> 1) |
| 52 | |
| 53 | #undef CONFIG_USE_IRQ /* no support for IRQs */ |
| 54 | #define CONFIG_MISC_INIT_R |
| 55 | |
| 56 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 57 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 58 | #define CONFIG_INITRD_TAG 1 |
| 59 | #define CONFIG_REVISION_TAG 1 |
| 60 | |
| 61 | /* |
| 62 | * Size of malloc() pool |
| 63 | */ |
Sandeep Paulraj | 9c44ddc | 2009-09-09 11:50:40 -0400 | [diff] [blame] | 64 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 65 | /* Sector */ |
Sandeep Paulraj | 9c44ddc | 2009-09-09 11:50:40 -0400 | [diff] [blame] | 66 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 67 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ |
| 68 | /* initial data */ |
| 69 | |
| 70 | /* |
| 71 | * Hardware drivers |
| 72 | */ |
| 73 | |
| 74 | /* |
| 75 | * NS16550 Configuration |
| 76 | */ |
| 77 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 78 | |
| 79 | #define CONFIG_SYS_NS16550 |
| 80 | #define CONFIG_SYS_NS16550_SERIAL |
| 81 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 82 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 83 | |
| 84 | /* |
| 85 | * select serial console configuration |
| 86 | */ |
| 87 | #define CONFIG_CONS_INDEX 3 |
| 88 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 89 | #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ |
| 90 | |
| 91 | /* allow to overwrite serial and ethaddr */ |
| 92 | #define CONFIG_ENV_OVERWRITE |
| 93 | #define CONFIG_BAUDRATE 115200 |
| 94 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 95 | 115200} |
| 96 | #define CONFIG_MMC 1 |
| 97 | #define CONFIG_OMAP3_MMC 1 |
| 98 | #define CONFIG_DOS_PARTITION 1 |
| 99 | |
Nishanth Menon | 30563a0 | 2009-11-07 10:51:24 -0500 | [diff] [blame] | 100 | /* DDR - I use Micron DDR */ |
| 101 | #define CONFIG_OMAP3_MICRON_DDR 1 |
| 102 | |
Tom Rix | 25374bf | 2009-10-31 12:37:43 -0500 | [diff] [blame] | 103 | /* USB */ |
| 104 | #define CONFIG_MUSB_UDC 1 |
| 105 | #define CONFIG_USB_OMAP3 1 |
| 106 | #define CONFIG_TWL4030_USB 1 |
| 107 | |
| 108 | /* USB device configuration */ |
| 109 | #define CONFIG_USB_DEVICE 1 |
| 110 | #define CONFIG_USB_TTY 1 |
| 111 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 112 | /* Change these to suit your needs */ |
| 113 | #define CONFIG_USBD_VENDORID 0x0451 |
| 114 | #define CONFIG_USBD_PRODUCTID 0x5678 |
| 115 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" |
| 116 | #define CONFIG_USBD_PRODUCT_NAME "Beagle" |
| 117 | |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 118 | /* commands to include */ |
| 119 | #include <config_cmd_default.h> |
| 120 | |
| 121 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
| 122 | #define CONFIG_CMD_FAT /* FAT support */ |
| 123 | #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ |
Nishanth Menon | 917cfc7 | 2009-03-25 22:13:56 +0100 | [diff] [blame] | 124 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
Stefan Roese | 942556a | 2009-05-12 14:32:58 +0200 | [diff] [blame] | 125 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
Nishanth Menon | 917cfc7 | 2009-03-25 22:13:56 +0100 | [diff] [blame] | 126 | #define MTDIDS_DEFAULT "nand0=nand" |
| 127 | #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ |
| 128 | "1920k(u-boot),128k(u-boot-env),"\ |
| 129 | "4m(kernel),-(fs)" |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 130 | |
| 131 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
| 132 | #define CONFIG_CMD_MMC /* MMC support */ |
| 133 | #define CONFIG_CMD_NAND /* NAND support */ |
| 134 | |
| 135 | #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
| 136 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
| 137 | #undef CONFIG_CMD_IMI /* iminfo */ |
| 138 | #undef CONFIG_CMD_IMLS /* List all found images */ |
| 139 | #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ |
| 140 | #undef CONFIG_CMD_NFS /* NFS support */ |
| 141 | |
| 142 | #define CONFIG_SYS_NO_FLASH |
Tom Rix | 0297ec7 | 2009-09-29 10:19:49 -0400 | [diff] [blame] | 143 | #define CONFIG_HARD_I2C 1 |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 144 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 145 | #define CONFIG_SYS_I2C_SLAVE 1 |
| 146 | #define CONFIG_SYS_I2C_BUS 0 |
| 147 | #define CONFIG_SYS_I2C_BUS_SELECT 1 |
| 148 | #define CONFIG_DRIVER_OMAP34XX_I2C 1 |
| 149 | |
| 150 | /* |
Tom Rix | 2c15513 | 2009-06-28 12:52:30 -0500 | [diff] [blame] | 151 | * TWL4030 |
| 152 | */ |
| 153 | #define CONFIG_TWL4030_POWER 1 |
| 154 | #define CONFIG_TWL4030_LED 1 |
| 155 | |
| 156 | /* |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 157 | * Board NAND Info. |
| 158 | */ |
| 159 | #define CONFIG_NAND_OMAP_GPMC |
| 160 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
| 161 | /* to access nand */ |
| 162 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 163 | /* to access nand at */ |
| 164 | /* CS0 */ |
| 165 | #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 |
| 166 | |
| 167 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
| 168 | /* devices */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 169 | #define CONFIG_JFFS2_NAND |
| 170 | /* nand device jffs2 lives on */ |
| 171 | #define CONFIG_JFFS2_DEV "nand0" |
| 172 | /* start of jffs2 partition */ |
| 173 | #define CONFIG_JFFS2_PART_OFFSET 0x680000 |
| 174 | #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ |
| 175 | /* partition */ |
| 176 | |
| 177 | /* Environment information */ |
| 178 | #define CONFIG_BOOTDELAY 10 |
| 179 | |
| 180 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 181 | "loadaddr=0x82000000\0" \ |
Tom Rix | 25374bf | 2009-10-31 12:37:43 -0500 | [diff] [blame] | 182 | "usbtty=cdc_acm\0" \ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 183 | "console=ttyS2,115200n8\0" \ |
Steve Sakoman | 13d2cb9 | 2009-10-10 14:29:37 -0400 | [diff] [blame] | 184 | "vram=12M\0" \ |
| 185 | "dvimode=1024x768MR-16@60\0" \ |
| 186 | "defaultdisplay=dvi\0" \ |
| 187 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
| 188 | "mmcrootfstype=ext3 rootwait\0" \ |
| 189 | "nandroot=/dev/mtdblock4 rw\0" \ |
| 190 | "nandrootfstype=jffs2\0" \ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 191 | "mmcargs=setenv bootargs console=${console} " \ |
Steve Sakoman | 13d2cb9 | 2009-10-10 14:29:37 -0400 | [diff] [blame] | 192 | "vram=${vram} " \ |
| 193 | "omapfb.mode=dvi:${dvimode} " \ |
| 194 | "omapfb.debug=y " \ |
| 195 | "omapdss.def_disp=${defaultdisplay} " \ |
| 196 | "root=${mmcroot} " \ |
| 197 | "rootfstype=${mmcrootfstype}\0" \ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 198 | "nandargs=setenv bootargs console=${console} " \ |
Steve Sakoman | 13d2cb9 | 2009-10-10 14:29:37 -0400 | [diff] [blame] | 199 | "vram=${vram} " \ |
| 200 | "omapfb.mode=dvi:${dvimode} " \ |
| 201 | "omapfb.debug=y " \ |
| 202 | "omapdss.def_disp=${defaultdisplay} " \ |
| 203 | "root=${nandroot} " \ |
| 204 | "rootfstype=${nandrootfstype}\0" \ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 205 | "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ |
| 206 | "bootscript=echo Running bootscript from mmc ...; " \ |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 207 | "source ${loadaddr}\0" \ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 208 | "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ |
| 209 | "mmcboot=echo Booting from mmc ...; " \ |
| 210 | "run mmcargs; " \ |
| 211 | "bootm ${loadaddr}\0" \ |
| 212 | "nandboot=echo Booting from nand ...; " \ |
| 213 | "run nandargs; " \ |
| 214 | "nand read ${loadaddr} 280000 400000; " \ |
| 215 | "bootm ${loadaddr}\0" \ |
| 216 | |
| 217 | #define CONFIG_BOOTCOMMAND \ |
Dirk Behme | a85693b | 2009-04-21 17:30:51 +0200 | [diff] [blame] | 218 | "if mmc init; then " \ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 219 | "if run loadbootscript; then " \ |
| 220 | "run bootscript; " \ |
| 221 | "else " \ |
| 222 | "if run loaduimage; then " \ |
| 223 | "run mmcboot; " \ |
| 224 | "else run nandboot; " \ |
| 225 | "fi; " \ |
| 226 | "fi; " \ |
| 227 | "else run nandboot; fi" |
| 228 | |
| 229 | #define CONFIG_AUTO_COMPLETE 1 |
| 230 | /* |
| 231 | * Miscellaneous configurable options |
| 232 | */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 233 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 234 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 235 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
Robert P. J. Day | 1270ec1 | 2009-12-12 12:10:33 -0500 | [diff] [blame] | 236 | #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 237 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 238 | /* Print Buffer Size */ |
| 239 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 240 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 241 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 242 | /* Boot Argument Buffer Size */ |
| 243 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 244 | |
| 245 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ |
| 246 | /* works on */ |
| 247 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
| 248 | 0x01F00000) /* 31MB */ |
| 249 | |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 250 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ |
| 251 | /* load address */ |
| 252 | |
| 253 | /* |
Manikandan Pillai | d3a513c | 2009-04-21 17:29:05 +0200 | [diff] [blame] | 254 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 255 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 256 | * This rate is divided by a local divisor. |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 257 | */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 258 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
Manikandan Pillai | d3a513c | 2009-04-21 17:29:05 +0200 | [diff] [blame] | 259 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 260 | #define CONFIG_SYS_HZ 1000 |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 261 | |
| 262 | /*----------------------------------------------------------------------- |
| 263 | * Stack sizes |
| 264 | * |
| 265 | * The stack sizes are set up in start.S using the settings below |
| 266 | */ |
Sandeep Paulraj | 9c44ddc | 2009-09-09 11:50:40 -0400 | [diff] [blame] | 267 | #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 268 | #ifdef CONFIG_USE_IRQ |
Sandeep Paulraj | 9c44ddc | 2009-09-09 11:50:40 -0400 | [diff] [blame] | 269 | #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ |
| 270 | #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 271 | #endif |
| 272 | |
| 273 | /*----------------------------------------------------------------------- |
| 274 | * Physical Memory Map |
| 275 | */ |
| 276 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
| 277 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
Sandeep Paulraj | 9c44ddc | 2009-09-09 11:50:40 -0400 | [diff] [blame] | 278 | #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 279 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 280 | |
| 281 | /* SDRAM Bank Allocation method */ |
| 282 | #define SDRC_R_B_C 1 |
| 283 | |
| 284 | /*----------------------------------------------------------------------- |
| 285 | * FLASH and environment organization |
| 286 | */ |
| 287 | |
| 288 | /* **** PISMO SUPPORT *** */ |
| 289 | |
| 290 | /* Configure the PISMO */ |
| 291 | #define PISMO1_NAND_SIZE GPMC_SIZE_128M |
| 292 | #define PISMO1_ONEN_SIZE GPMC_SIZE_128M |
| 293 | |
| 294 | #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ |
| 295 | /* one chip */ |
| 296 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ |
Sandeep Paulraj | 9c44ddc | 2009-09-09 11:50:40 -0400 | [diff] [blame] | 297 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 298 | |
| 299 | #define CONFIG_SYS_FLASH_BASE boot_flash_base |
| 300 | |
| 301 | /* Monitor at start of flash */ |
| 302 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 303 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
| 304 | |
| 305 | #define CONFIG_ENV_IS_IN_NAND 1 |
| 306 | #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 307 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 308 | |
| 309 | #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec |
| 310 | #define CONFIG_ENV_OFFSET boot_flash_off |
| 311 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
| 312 | |
| 313 | /*----------------------------------------------------------------------- |
| 314 | * CFI FLASH driver setup |
| 315 | */ |
| 316 | /* timeout values are in ticks */ |
| 317 | #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) |
| 318 | #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) |
| 319 | |
| 320 | /* Flash banks JFFS2 should use */ |
| 321 | #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ |
| 322 | CONFIG_SYS_MAX_NAND_DEVICE) |
| 323 | #define CONFIG_SYS_JFFS2_MEM_NAND |
| 324 | /* use flash_info[2] */ |
| 325 | #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS |
| 326 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 |
| 327 | |
| 328 | #ifndef __ASSEMBLY__ |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 329 | extern unsigned int boot_flash_base; |
| 330 | extern volatile unsigned int boot_flash_env_addr; |
| 331 | extern unsigned int boot_flash_off; |
| 332 | extern unsigned int boot_flash_sec; |
| 333 | extern unsigned int boot_flash_type; |
| 334 | #endif |
| 335 | |
Dirk Behme | f904cdb | 2009-01-27 18:19:12 +0100 | [diff] [blame] | 336 | #endif /* __CONFIG_H */ |