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Albert ARIBAUD \(3ADEV\)606f7042015-03-31 11:40:46 +02001/*
2 * LPC32xx GPIO interface
3 *
4 * (C) Copyright 2014 DENX Software Engineering GmbH
5 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10/**
11 * GPIO Register map for LPC32xx
12 */
13
14struct gpio_regs {
15 u32 p3_inp_state;
16 u32 p3_outp_set;
17 u32 p3_outp_clr;
18 u32 p3_outp_state;
19 /* Watch out! the following are shared between p2 and p3 */
20 u32 p2_p3_dir_set;
21 u32 p2_p3_dir_clr;
22 u32 p2_p3_dir_state;
23 /* Now back to 'one register for one port' */
24 u32 p2_inp_state;
25 u32 p2_outp_set;
26 u32 p2_outp_clr;
27 u32 reserved1[6];
28 u32 p0_inp_state;
29 u32 p0_outp_set;
30 u32 p0_outp_clr;
31 u32 p0_outp_state;
32 u32 p0_dir_set;
33 u32 p0_dir_clr;
34 u32 p0_dir_state;
35 u32 reserved2;
36 u32 p1_inp_state;
37 u32 p1_outp_set;
38 u32 p1_outp_clr;
39 u32 p1_outp_state;
40 u32 p1_dir_set;
41 u32 p1_dir_clr;
42 u32 p1_dir_state;
43};