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Ian Campbell2c7e3b92014-10-24 21:20:44 +01001if ARCH_SUNXI
2
Hans de Goede44d8ae52015-04-06 20:33:34 +02003# Note only one of these may be selected at a time! But hidden choices are
4# not supported by Kconfig
5config SUNXI_GEN_SUN4I
6 bool
7 ---help---
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
10
11config SUNXI_GEN_SUN6I
12 bool
13 ---help---
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
16 watchdog, etc.
17
18
Ian Campbell2c7e3b92014-10-24 21:20:44 +010019choice
20 prompt "Sunxi SoC Variant"
21
Ian Campbellc3be2792014-10-24 21:20:45 +010022config MACH_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010023 bool "sun4i (Allwinner A10)"
24 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020025 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010026 select SUPPORT_SPL
27
Ian Campbellc3be2792014-10-24 21:20:45 +010028config MACH_SUN5I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010029 bool "sun5i (Allwinner A13)"
30 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020031 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010032 select SUPPORT_SPL
33
Ian Campbellc3be2792014-10-24 21:20:45 +010034config MACH_SUN6I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010035 bool "sun6i (Allwinner A31)"
36 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020037 select SUNXI_GEN_SUN6I
Hans de Goede8c2c9cf2014-10-25 20:18:10 +020038 select SUPPORT_SPL
Ian Campbell2c7e3b92014-10-24 21:20:44 +010039
Ian Campbellc3be2792014-10-24 21:20:45 +010040config MACH_SUN7I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010041 bool "sun7i (Allwinner A20)"
42 select CPU_V7
Hans de Goedeea624e12014-11-14 09:34:30 +010043 select CPU_V7_HAS_NONSEC
44 select CPU_V7_HAS_VIRT
Hans de Goede44d8ae52015-04-06 20:33:34 +020045 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010046 select SUPPORT_SPL
Hans de Goedeb366fb92014-10-24 20:12:04 +020047 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbell2c7e3b92014-10-24 21:20:44 +010048
Ian Campbellc3be2792014-10-24 21:20:45 +010049config MACH_SUN8I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010050 bool "sun8i (Allwinner A23)"
51 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020052 select SUNXI_GEN_SUN6I
Hans de Goede08fd1472014-12-07 14:34:27 +010053 select SUPPORT_SPL
Ian Campbell2c7e3b92014-10-24 21:20:44 +010054
55endchoice
Maxime Ripard8a6564d2014-10-03 20:16:29 +080056
Hans de Goede37781a12014-11-15 19:46:39 +010057config DRAM_CLK
Hans de Goede8ffc4872015-01-17 14:24:55 +010058 int "sunxi dram clock speed"
59 default 312 if MACH_SUN6I || MACH_SUN8I
60 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede37781a12014-11-15 19:46:39 +010061 ---help---
62 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goedee1a08882015-01-25 11:29:27 +010063 of 24.
Hans de Goede37781a12014-11-15 19:46:39 +010064
Siarhei Siamashka47e35012015-02-01 00:27:06 +020065if MACH_SUN5I || MACH_SUN7I
66config DRAM_MBUS_CLK
67 int "sunxi mbus clock speed"
68 default 300
69 ---help---
70 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
71
72endif
73
Hans de Goede37781a12014-11-15 19:46:39 +010074config DRAM_ZQ
Hans de Goede8ffc4872015-01-17 14:24:55 +010075 int "sunxi dram zq value"
76 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
77 default 127 if MACH_SUN7I
Hans de Goede37781a12014-11-15 19:46:39 +010078 ---help---
Hans de Goedee1a08882015-01-25 11:29:27 +010079 Set the dram zq value.
Hans de Goede37781a12014-11-15 19:46:39 +010080
Hans de Goede8ffc4872015-01-17 14:24:55 +010081if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
82config DRAM_EMR1
83 int "sunxi dram emr1 value"
84 default 0 if MACH_SUN4I
85 default 4 if MACH_SUN5I || MACH_SUN7I
86 ---help---
Hans de Goedee1a08882015-01-25 11:29:27 +010087 Set the dram controller emr1 value.
Siarhei Siamashkad1336472015-02-01 00:27:05 +020088
Siarhei Siamashka47e35012015-02-01 00:27:06 +020089config DRAM_ODT_EN
90 int "sunxi dram odt_en value"
91 default 0
92 ---help---
93 Set the dram controller odt_en parameter. This can be used to
94 enable/disable the ODT feature.
95
96config DRAM_TPR3
97 hex "sunxi dram tpr3 value"
98 default 0
99 ---help---
100 Set the dram controller tpr3 parameter. This parameter configures
101 the delay on the command lane and also phase shifts, which are
102 applied for sampling incoming read data. The default value 0
103 means that no phase/delay adjustments are necessary. Properly
104 configuring this parameter increases reliability at high DRAM
105 clock speeds.
106
107config DRAM_DQS_GATING_DELAY
108 hex "sunxi dram dqs_gating_delay value"
109 default 0
110 ---help---
111 Set the dram controller dqs_gating_delay parmeter. Each byte
112 encodes the DQS gating delay for each byte lane. The delay
113 granularity is 1/4 cycle. For example, the value 0x05060606
114 means that the delay is 5 quarter-cycles for one lane (1.25
115 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
116 The default value 0 means autodetection. The results of hardware
117 autodetection are not very reliable and depend on the chip
118 temperature (sometimes producing different results on cold start
119 and warm reboot). But the accuracy of hardware autodetection
120 is usually good enough, unless running at really high DRAM
121 clocks speeds (up to 600MHz). If unsure, keep as 0.
122
Siarhei Siamashkad1336472015-02-01 00:27:05 +0200123choice
124 prompt "sunxi dram timings"
125 default DRAM_TIMINGS_VENDOR_MAGIC
126 ---help---
127 Select the timings of the DDR3 chips.
128
129config DRAM_TIMINGS_VENDOR_MAGIC
130 bool "Magic vendor timings from Android"
131 ---help---
132 The same DRAM timings as in the Allwinner boot0 bootloader.
133
134config DRAM_TIMINGS_DDR3_1066F_1333H
135 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
136 ---help---
137 Use the timings of the standard JEDEC DDR3-1066F speed bin for
138 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
139 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
140 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
141 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
142 that down binning to DDR3-1066F is supported (because DDR3-1066F
143 uses a bit faster timings than DDR3-1333H).
144
145config DRAM_TIMINGS_DDR3_800E_1066G_1333J
146 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
147 ---help---
148 Use the timings of the slowest possible JEDEC speed bin for the
149 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
150 DDR3-800E, DDR3-1066G or DDR3-1333J.
151
152endchoice
153
Hans de Goede37781a12014-11-15 19:46:39 +0100154endif
155
Iain Patone71b4222015-03-28 10:26:38 +0000156config SYS_CLK_FREQ
157 default 912000000 if MACH_SUN7I
158 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
159
Maxime Ripard8a6564d2014-10-03 20:16:29 +0800160config SYS_CONFIG_NAME
Ian Campbellc3be2792014-10-24 21:20:45 +0100161 default "sun4i" if MACH_SUN4I
162 default "sun5i" if MACH_SUN5I
163 default "sun6i" if MACH_SUN6I
164 default "sun7i" if MACH_SUN7I
165 default "sun8i" if MACH_SUN8I
Hans de Goede6ae66f22014-08-01 09:28:24 +0200166
Masahiro Yamadadd840582014-07-30 14:08:14 +0900167config SYS_BOARD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900168 default "sunxi"
169
170config SYS_SOC
Masahiro Yamadadd840582014-07-30 14:08:14 +0900171 default "sunxi"
172
Ian Campbell4ce99412014-10-24 21:20:46 +0100173config SPL_FEL
174 bool "SPL/FEL mode support"
175 depends on SPL
176 default n
Simon Glass942cb0b2015-02-07 10:47:30 -0700177 help
178 This enables support for Fast Early Loader (FEL) mode. This
179 allows U-Boot to be loaded to the board over USB by the on-chip
180 boot rom. U-Boot should be sent in two parts: SPL first, with
181 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
182 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
183 shrinks the amount of SRAM available to SPL, so only enable it if
184 you need FEL. Note that enabling this option only allows FEL to be
185 used; it is still possible to boot U-Boot from boot media. U-Boot
186 SPL detects when it is being loaded using FEL.
Ian Campbell4ce99412014-10-24 21:20:46 +0100187
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200188config UART0_PORT_F
189 bool "UART0 on MicroSD breakout board"
190 depends on SPL_FEL
191 default n
192 ---help---
193 Repurpose the SD card slot for getting access to the UART0 serial
194 console. Primarily useful only for low level u-boot debugging on
195 tablets, where normal UART0 is difficult to access and requires
196 device disassembly and/or soldering. As the SD card can't be used
197 at the same time, the system can be only booted in the FEL mode.
198 Only enable this if you really know what you are doing.
199
Ian Campbell98e214d2014-08-31 13:13:43 +0100200config FDTFILE
201 string "Default fdtfile env setting for this board"
Hans de Goede846e3252014-08-01 09:37:58 +0200202
Hans de Goedeaccc9e42014-10-22 14:56:36 +0200203config OLD_SUNXI_KERNEL_COMPAT
204 boolean "Enable workarounds for booting old kernels"
205 default n
206 ---help---
207 Set this to enable various workarounds for old kernels, this results in
208 sub-optimal settings for newer kernels, only enable if needed.
209
Hans de Goedecd821132014-10-02 20:29:26 +0200210config MMC0_CD_PIN
211 string "Card detect pin for mmc0"
212 default ""
213 ---help---
214 Set the card detect pin for mmc0, leave empty to not use cd. This
215 takes a string in the format understood by sunxi_name_to_gpio, e.g.
216 PH1 for pin 1 of port H.
217
218config MMC1_CD_PIN
219 string "Card detect pin for mmc1"
220 default ""
221 ---help---
222 See MMC0_CD_PIN help text.
223
224config MMC2_CD_PIN
225 string "Card detect pin for mmc2"
226 default ""
227 ---help---
228 See MMC0_CD_PIN help text.
229
230config MMC3_CD_PIN
231 string "Card detect pin for mmc3"
232 default ""
233 ---help---
234 See MMC0_CD_PIN help text.
235
Paul Kocialkowski8deacca2015-03-22 18:12:23 +0100236config MMC1_PINS
237 string "Pins for mmc1"
238 default ""
239 ---help---
240 Set the pins used for mmc1, when applicable. This takes a string in the
241 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
242
243config MMC2_PINS
244 string "Pins for mmc2"
245 default ""
246 ---help---
247 See MMC1_PINS help text.
248
249config MMC3_PINS
250 string "Pins for mmc3"
251 default ""
252 ---help---
253 See MMC1_PINS help text.
254
Hans de Goede2ccfac02014-10-02 20:43:50 +0200255config MMC_SUNXI_SLOT_EXTRA
256 int "mmc extra slot number"
257 default -1
258 ---help---
259 sunxi builds always enable mmc0, some boards also have a second sdcard
260 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
261 support for this.
262
Hans de Goede4458b7a2015-01-07 15:26:06 +0100263config USB0_VBUS_PIN
264 string "Vbus enable pin for usb0 (otg)"
265 default ""
266 ---help---
267 Set the Vbus enable pin for usb0 (otg). This takes a string in the
268 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
269
Hans de Goede52defe82015-02-16 22:13:43 +0100270config USB0_VBUS_DET
271 string "Vbus detect pin for usb0 (otg)"
Hans de Goede52defe82015-02-16 22:13:43 +0100272 default ""
273 ---help---
274 Set the Vbus detect pin for usb0 (otg). This takes a string in the
275 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
276
Hans de Goede115200c2014-11-07 16:09:00 +0100277config USB1_VBUS_PIN
278 string "Vbus enable pin for usb1 (ehci0)"
279 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goede76946df2014-11-07 14:51:12 +0100280 default "PH27" if MACH_SUN6I
Hans de Goede115200c2014-11-07 16:09:00 +0100281 ---help---
282 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
283 a string in the format understood by sunxi_name_to_gpio, e.g.
284 PH1 for pin 1 of port H.
285
286config USB2_VBUS_PIN
287 string "Vbus enable pin for usb2 (ehci1)"
288 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goede76946df2014-11-07 14:51:12 +0100289 default "PH24" if MACH_SUN6I
Hans de Goede115200c2014-11-07 16:09:00 +0100290 ---help---
291 See USB1_VBUS_PIN help text.
292
Paul Kocialkowski6c739c52015-04-10 23:09:52 +0200293config I2C0_ENABLE
294 bool "Enable I2C/TWI controller 0"
295 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
296 default n if MACH_SUN6I || MACH_SUN8I
297 ---help---
298 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
299 its clock and setting up the bus. This is especially useful on devices
300 with slaves connected to the bus or with pins exposed through e.g. an
301 expansion port/header.
302
303config I2C1_ENABLE
304 bool "Enable I2C/TWI controller 1"
305 default n
306 ---help---
307 See I2C0_ENABLE help text.
308
309config I2C2_ENABLE
310 bool "Enable I2C/TWI controller 2"
311 default n
312 ---help---
313 See I2C0_ENABLE help text.
314
315if MACH_SUN6I || MACH_SUN7I
316config I2C3_ENABLE
317 bool "Enable I2C/TWI controller 3"
318 default n
319 ---help---
320 See I2C0_ENABLE help text.
321endif
322
323if MACH_SUN7I
324config I2C4_ENABLE
325 bool "Enable I2C/TWI controller 4"
326 default n
327 ---help---
328 See I2C0_ENABLE help text.
329endif
330
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200331config VIDEO
Hans de Goede2dae8002014-12-21 16:28:32 +0100332 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200333 default y
334 ---help---
Hans de Goede2dae8002014-12-21 16:28:32 +0100335 Say Y here to add support for using a cfb console on the HDMI, LCD
336 or VGA output found on most sunxi devices. See doc/README.video for
337 info on how to select the video output and mode.
338
Hans de Goede2fbf0912014-12-23 23:04:35 +0100339config VIDEO_HDMI
340 boolean "HDMI output support"
341 depends on VIDEO && !MACH_SUN8I
342 default y
343 ---help---
344 Say Y here to add support for outputting video over HDMI.
345
Hans de Goeded9786d22014-12-25 13:58:06 +0100346config VIDEO_VGA
347 boolean "VGA output support"
348 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
349 default n
350 ---help---
351 Say Y here to add support for outputting video over VGA.
352
Hans de Goedee2bbdfb2014-12-24 12:17:07 +0100353config VIDEO_VGA_VIA_LCD
354 boolean "VGA via LCD controller support"
Chen-Yu Tsai2583d5b2015-01-12 18:02:10 +0800355 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedee2bbdfb2014-12-24 12:17:07 +0100356 default n
357 ---help---
358 Say Y here to add support for external DACs connected to the parallel
359 LCD interface driving a VGA connector, such as found on the
360 Olimex A13 boards.
361
Hans de Goedefb75d972015-01-25 15:33:07 +0100362config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
363 boolean "Force sync active high for VGA via LCD controller support"
364 depends on VIDEO_VGA_VIA_LCD
365 default n
366 ---help---
367 Say Y here if you've a board which uses opendrain drivers for the vga
368 hsync and vsync signals. Opendrain drivers cannot generate steep enough
369 positive edges for a stable video output, so on boards with opendrain
370 drivers the sync signals must always be active high.
371
Chen-Yu Tsai507e27d2015-01-12 18:02:11 +0800372config VIDEO_VGA_EXTERNAL_DAC_EN
373 string "LCD panel power enable pin"
374 depends on VIDEO_VGA_VIA_LCD
375 default ""
376 ---help---
377 Set the enable pin for the external VGA DAC. This takes a string in the
378 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
379
Hans de Goede2dae8002014-12-21 16:28:32 +0100380config VIDEO_LCD_MODE
381 string "LCD panel timing details"
382 depends on VIDEO
383 default ""
384 ---help---
385 LCD panel timing details string, leave empty if there is no LCD panel.
386 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
387 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
388
Hans de Goede65150322015-01-13 13:21:46 +0100389config VIDEO_LCD_DCLK_PHASE
390 int "LCD panel display clock phase"
391 depends on VIDEO
392 default 1
393 ---help---
394 Select LCD panel display clock phase shift, range 0-3.
395
Hans de Goede2dae8002014-12-21 16:28:32 +0100396config VIDEO_LCD_POWER
397 string "LCD panel power enable pin"
398 depends on VIDEO
399 default ""
400 ---help---
401 Set the power enable pin for the LCD panel. This takes a string in the
402 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
403
Hans de Goede242e3d82015-02-16 17:26:41 +0100404config VIDEO_LCD_RESET
405 string "LCD panel reset pin"
406 depends on VIDEO
407 default ""
408 ---help---
409 Set the reset pin for the LCD panel. This takes a string in the format
410 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
411
Hans de Goede2dae8002014-12-21 16:28:32 +0100412config VIDEO_LCD_BL_EN
413 string "LCD panel backlight enable pin"
414 depends on VIDEO
415 default ""
416 ---help---
417 Set the backlight enable pin for the LCD panel. This takes a string in the
418 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
419 port H.
420
421config VIDEO_LCD_BL_PWM
422 string "LCD panel backlight pwm pin"
423 depends on VIDEO
424 default ""
425 ---help---
426 Set the backlight pwm pin for the LCD panel. This takes a string in the
427 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200428
Hans de Goedea7403ae2015-01-22 21:02:42 +0100429config VIDEO_LCD_BL_PWM_ACTIVE_LOW
430 bool "LCD panel backlight pwm is inverted"
431 depends on VIDEO
432 default y
433 ---help---
434 Set this if the backlight pwm output is active low.
435
Hans de Goede55410082015-02-16 17:23:25 +0100436config VIDEO_LCD_PANEL_I2C
437 bool "LCD panel needs to be configured via i2c"
438 depends on VIDEO
Hans de Goede1fc42012015-03-07 12:00:02 +0100439 default n
Hans de Goede55410082015-02-16 17:23:25 +0100440 ---help---
441 Say y here if the LCD panel needs to be configured via i2c. This
442 will add a bitbang i2c controller using gpios to talk to the LCD.
443
444config VIDEO_LCD_PANEL_I2C_SDA
445 string "LCD panel i2c interface SDA pin"
446 depends on VIDEO_LCD_PANEL_I2C
447 default "PG12"
448 ---help---
449 Set the SDA pin for the LCD i2c interface. This takes a string in the
450 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
451
452config VIDEO_LCD_PANEL_I2C_SCL
453 string "LCD panel i2c interface SCL pin"
454 depends on VIDEO_LCD_PANEL_I2C
455 default "PG10"
456 ---help---
457 Set the SCL pin for the LCD i2c interface. This takes a string in the
458 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
459
Hans de Goede213480e2015-01-01 22:04:34 +0100460
461# Note only one of these may be selected at a time! But hidden choices are
462# not supported by Kconfig
463config VIDEO_LCD_IF_PARALLEL
464 bool
465
466config VIDEO_LCD_IF_LVDS
467 bool
468
469
470choice
471 prompt "LCD panel support"
472 depends on VIDEO
473 ---help---
474 Select which type of LCD panel to support.
475
476config VIDEO_LCD_PANEL_PARALLEL
477 bool "Generic parallel interface LCD panel"
478 select VIDEO_LCD_IF_PARALLEL
479
480config VIDEO_LCD_PANEL_LVDS
481 bool "Generic lvds interface LCD panel"
482 select VIDEO_LCD_IF_LVDS
483
Siarhei Siamashka97ece832015-01-19 05:23:33 +0200484config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
485 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
486 select VIDEO_LCD_SSD2828
487 select VIDEO_LCD_IF_PARALLEL
488 ---help---
489 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
490
Hans de Goede27515b22015-01-20 09:23:36 +0100491config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
492 bool "Hitachi tx18d42vm LCD panel"
493 select VIDEO_LCD_HITACHI_TX18D42VM
494 select VIDEO_LCD_IF_LVDS
495 ---help---
496 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
497
Hans de Goedeaad2ac22015-02-16 17:49:47 +0100498config VIDEO_LCD_TL059WV5C0
499 bool "tl059wv5c0 LCD panel"
500 select VIDEO_LCD_PANEL_I2C
501 select VIDEO_LCD_IF_PARALLEL
502 ---help---
503 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
504 Aigo M60/M608/M606 tablets.
505
Hans de Goede213480e2015-01-01 22:04:34 +0100506endchoice
507
508
Hans de Goede1a800f72015-01-11 17:17:00 +0100509config USB_MUSB_SUNXI
510 bool "Enable sunxi OTG / DRC USB controller in host mode"
511 default n
512 ---help---
513 Say y here to enable support for the sunxi OTG / DRC USB controller
514 used on almost all sunxi boards. Note currently u-boot can only have
515 one usb host controller enabled at a time, so enabling this on boards
516 which also use the ehci host controller will result in build errors.
517
Hans de Goede86b49092014-09-18 21:03:34 +0200518config USB_KEYBOARD
519 boolean "Enable USB keyboard support"
520 default y
521 ---help---
522 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede2dae8002014-12-21 16:28:32 +0100523 in combination with a graphical console).
Hans de Goede86b49092014-09-18 21:03:34 +0200524
Hans de Goedec13f60d2015-01-25 12:10:48 +0100525config GMAC_TX_DELAY
526 int "GMAC Transmit Clock Delay Chain"
527 default 0
528 ---help---
529 Set the GMAC Transmit Clock Delay Chain value.
530
Masahiro Yamadadd840582014-07-30 14:08:14 +0900531endif