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Daniel Hellstromab68f922008-03-28 10:20:43 +01001/* Configuration header file for LEON2 GRSIM.
2 *
3 * (C) Copyright 2003-2005
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2007
7 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
8 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromab68f922008-03-28 10:20:43 +010010 */
11
12#ifndef __CONFIG_H__
13#define __CONFIG_H__
14
15/*
16 * High Level Configuration Options
17 * (easy to change)
18 *
19 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
20 *
21 * TSIM command
22 * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
23 *
24 */
25
Daniel Hellstromab68f922008-03-28 10:20:43 +010026#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
27#define CONFIG_TSIM 1 /* ... running on TSIM */
28
29/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020030#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromab68f922008-03-28 10:20:43 +010031
32/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstromab68f922008-03-28 10:20:43 +010034
35/*
36 * Serial console configuration
37 */
38#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromab68f922008-03-28 10:20:43 +010040
41/* Partitions */
42#define CONFIG_DOS_PARTITION
43#define CONFIG_MAC_PARTITION
44#define CONFIG_ISO_PARTITION
45
46/*
47 * Supported commands
48 */
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020049#define CONFIG_CMD_BDI /* bdinfo */
50#define CONFIG_CMD_CONSOLE /* coninfo */
Daniel Hellstromab68f922008-03-28 10:20:43 +010051#define CONFIG_CMD_DIAG
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020052#define CONFIG_CMD_ECHO /* echo arguments */
53#define CONFIG_CMD_FPGA /* FPGA configuration Support */
Daniel Hellstromab68f922008-03-28 10:20:43 +010054#define CONFIG_CMD_IRQ
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020055#define CONFIG_CMD_ITEST /* Integer (and string) test */
56#define CONFIG_CMD_LOADB /* loadb */
57#define CONFIG_CMD_LOADS /* loads */
Daniel Hellstromab68f922008-03-28 10:20:43 +010058#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
59#define CONFIG_CMD_REGINFO
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020060#define CONFIG_CMD_RUN /* run command in env variable */
61#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
62#define CONFIG_CMD_SOURCE /* "source" command support */
63#define CONFIG_CMD_XIMG /* Load part of Multi Image */
Daniel Hellstromab68f922008-03-28 10:20:43 +010064
65/*
66 * Autobooting
67 */
68#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
69
70#define CONFIG_PREBOOT "echo;" \
71 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
72 "echo"
73
74#undef CONFIG_BOOTARGS
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075/*#define CONFIG_SYS_HUSH_PARSER 0*/
Daniel Hellstromab68f922008-03-28 10:20:43 +010076
77#define CONFIG_EXTRA_ENV_SETTINGS \
78 "netdev=eth0\0" \
79 "nfsargs=setenv bootargs root=/dev/nfs rw " \
80 "nfsroot=${serverip}:${rootpath}\0" \
81 "ramargs=setenv bootargs root=/dev/ram rw\0" \
82 "addip=setenv bootargs ${bootargs} " \
83 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
84 ":${hostname}:${netdev}:off panic=1\0" \
85 "flash_nfs=run nfsargs addip;" \
86 "bootm ${kernel_addr}\0" \
87 "flash_self=run ramargs addip;" \
88 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
89 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
90 "rootpath=/export/roofs\0" \
91 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000092 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstromab68f922008-03-28 10:20:43 +010093 "ethaddr=00:00:7A:CC:00:12\0" \
94 "bootargs=console=ttyS0,38400" \
95 ""
96#define CONFIG_NETMASK 255.255.255.0
97#define CONFIG_GATEWAYIP 192.168.0.1
98#define CONFIG_SERVERIP 192.168.0.81
99#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000100#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstromab68f922008-03-28 10:20:43 +0100101#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000102#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstromab68f922008-03-28 10:20:43 +0100103
104#define CONFIG_BOOTCOMMAND "run flash_self"
105
106/* Memory MAP
107 *
108 * Flash:
109 * |--------------------------------|
110 * | 0x00000000 Text & Data & BSS | *
111 * | for Monitor | *
112 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
113 * | UNUSED / Growth | * 256kb
114 * |--------------------------------|
115 * | 0x00050000 Base custom area | *
116 * | kernel / FS | *
117 * | | * Rest of Flash
118 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
119 * | END-0x00008000 Environment | * 32kb
120 * |--------------------------------|
121 *
122 *
123 *
124 * Main Memory:
125 * |--------------------------------|
126 * | UNUSED / scratch area |
127 * | |
128 * | |
129 * | |
130 * | |
131 * |--------------------------------|
132 * | Monitor .Text / .DATA / .BSS | * 256kb
133 * | Relocated! | *
134 * |--------------------------------|
135 * | Monitor Malloc | * 128kb (contains relocated environment)
136 * |--------------------------------|
137 * | Monitor/kernel STACK | * 64kb
138 * |--------------------------------|
139 * | Page Table for MMU systems | * 2k
140 * |--------------------------------|
141 * | PROM Code accessed from Linux | * 6kb-128b
142 * |--------------------------------|
143 * | Global data (avail from kernel)| * 128b
144 * |--------------------------------|
145 *
146 */
147
148/*
149 * Flash configuration (8,16 or 32 MB)
150 * TEXT base always at 0xFFF00000
151 * ENV_ADDR always at 0xFFF40000
152 * FLASH_BASE at 0xFC000000 for 64 MB
153 * 0xFE000000 for 32 MB
154 * 0xFF000000 for 16 MB
155 * 0xFF800000 for 8 MB
156 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200157#define CONFIG_SYS_NO_FLASH 1
158#define CONFIG_SYS_FLASH_BASE 0x00000000
159#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200160#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100163
164#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
166#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100167
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
169#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
170#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
171#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100172
173#ifdef ENABLE_FLASH_SUPPORT
174/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100176
177#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
178
179/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200181#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromab68f922008-03-28 10:20:43 +0100183#endif
184
185/*
186 * Environment settings
187 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200188#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200189/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200190/*#define CONFIG_ENV_SIZE 0x8000*/
191#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100192#define CONFIG_ENV_OVERWRITE 1
193
194/*
195 * Memory map
196 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197#define CONFIG_SYS_SDRAM_BASE 0x40000000
198#define CONFIG_SYS_SDRAM_SIZE 0x00800000
199#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100200
201/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#undef CONFIG_SYS_SRAM_BASE
203#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstromab68f922008-03-28 10:20:43 +0100204
205
206/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
208#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
209#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromab68f922008-03-28 10:20:43 +0100210
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200211#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100212
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200213#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100215
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
217#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100218
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200219#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
221# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromab68f922008-03-28 10:20:43 +0100222#endif
223
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
225#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
226#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100227
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
229#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100230
231/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
233#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100234
235/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200236#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100237
238/*
239 * Ethernet configuration
240 */
241/*#define CONFIG_GRETH 1*/
Daniel Hellstromab68f922008-03-28 10:20:43 +0100242
243/* Default HARDWARE address */
244#define GRETH_HWADDR_0 0x00
245#define GRETH_HWADDR_1 0x00
246#define GRETH_HWADDR_2 0x7A
247#define GRETH_HWADDR_3 0xcc
248#define GRETH_HWADDR_4 0x00
249#define GRETH_HWADDR_5 0x12
250
251#define CONFIG_ETHADDR 00:00:7a:cc:00:12
252
253/*
254 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
255 */
256/* #define CONFIG_GRETH_10MBIT 1 */
257#define CONFIG_PHY_ADDR 0x00
258
259/*
260 * Miscellaneous configurable options
261 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100263#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100265#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100267#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
269#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
270#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100271
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200272#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
273#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100274
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200275#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100276
Daniel Hellstromab68f922008-03-28 10:20:43 +0100277/***** Gaisler GRLIB IP-Cores Config ********/
278
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200279#define CONFIG_SYS_GRLIB_SDRAM 0
280#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100281#if CONFIG_GRSIM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200282#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100283#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstromab68f922008-03-28 10:20:43 +0100285#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100287
288/*** LEON2 UART 1 ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200289#define CONFIG_SYS_LEON2_UART1_SCALER \
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -0700290 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
291
Daniel Hellstromab68f922008-03-28 10:20:43 +0100292/* UART1 Define to 1 or 0 */
293#define LEON2_UART1_LOOPBACK_ENABLE 0
294#define LEON2_UART1_FLOWCTRL_ENABLE 0
295#define LEON2_UART1_PARITY_ENABLE 0
296#define LEON2_UART1_ODDPAR_ENABLE 0
297
298/*** LEON2 UART 2 ***/
299
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200300#define CONFIG_SYS_LEON2_UART2_SCALER \
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -0700301 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100302
303/* UART2 Define to 1 or 0 */
304#define LEON2_UART2_LOOPBACK_ENABLE 0
305#define LEON2_UART2_FLOWCTRL_ENABLE 0
306#define LEON2_UART2_PARITY_ENABLE 0
307#define LEON2_UART2_ODDPAR_ENABLE 0
308
309#define LEON_CONSOLE_UART1 1
310#define LEON_CONSOLE_UART2 2
311
312/* Use UART2 as console */
313#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
314
315/* LEON2 I/O Port */
316/*#define LEON2_IO_PORT_DIR 0x0000aa00*/
317
318/* default kernel command line */
319#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
320
321#define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2"
322
323#endif /* __CONFIG_H */