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Rajeshwari Shinde589c3972012-07-03 20:02:51 +00001/*
2 * Copyright (c) 2012 The Chromium OS Authors.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Rajeshwari Shinde589c3972012-07-03 20:02:51 +00005 */
6
7#ifndef __ASM_ARCH_EXYNOS_SPL_H__
8#define __ASM_ARCH_EXYNOS_SPL_H__
9
10#include <asm/arch-exynos/dmc.h>
11
12enum boot_mode {
13 /*
14 * Assign the OM pin values for respective boot modes.
15 * Exynos4 does not support spi boot and the mmc boot OM
16 * pin values are the same across Exynos4 and Exynos5.
17 */
18 BOOT_MODE_MMC = 4,
Rajeshwari Shinde493c0732013-06-25 19:17:06 +053019 BOOT_MODE_EMMC = 8, /* EMMC4.4 */
Rajeshwari Shinde589c3972012-07-03 20:02:51 +000020 BOOT_MODE_SERIAL = 20,
21 /* Boot based on Operating Mode pin settings */
22 BOOT_MODE_OM = 32,
23 BOOT_MODE_USB, /* Boot using USB download */
24};
25
26#ifndef __ASSEMBLY__
27/* Parameters of early board initialization in SPL */
28struct spl_machine_param {
29 /* Add fields as and when required */
30 u32 signature;
31 u32 version; /* Version number */
32 u32 size; /* Size of block */
33 /**
34 * Parameters we expect, in order, terminated with \0. Each parameter
35 * is a single character representing one 32-bit word in this
36 * structure.
37 *
38 * Valid characters in this string are:
39 *
40 * Code Name
41 * v mem_iv_size
42 * m mem_type
43 * u uboot_size
44 * b boot_source
45 * f frequency_mhz (memory frequency in MHz)
46 * a ARM clock frequency in MHz
47 * s serial base address
48 * i i2c base address for early access (meant for PMIC)
49 * r board rev GPIO numbers used to read board revision
50 * (lower halfword=bit 0, upper=bit 1)
51 * M Memory Manufacturer name
52 * \0 termination
53 */
54 char params[12]; /* Length must be word-aligned */
55 u32 mem_iv_size; /* Memory channel interleaving size */
56 enum ddr_mode mem_type; /* Type of on-board memory */
57 /*
58 * U-boot size - The iROM mmc copy function used by the SPL takes a
59 * block count paramter to describe the u-boot size unlike the spi
60 * boot copy function which just uses the u-boot size directly. Align
61 * the u-boot size to block size (512 bytes) when populating the SPL
62 * table only for mmc boot.
63 */
64 u32 uboot_size;
65 enum boot_mode boot_source; /* Boot device */
Rajeshwari Shinde589c3972012-07-03 20:02:51 +000066 unsigned frequency_mhz; /* Frequency of memory in MHz */
67 unsigned arm_freq_mhz; /* ARM Frequency in MHz */
68 u32 serial_base; /* Serial base address */
69 u32 i2c_base; /* i2c base address */
Simon Glassc42ffff2013-02-18 20:32:59 +000070 u32 board_rev_gpios; /* Board revision GPIOs */
71 enum mem_manuf mem_manuf; /* Memory Manufacturer */
Rajeshwari Shinde589c3972012-07-03 20:02:51 +000072} __attribute__((__packed__));
73#endif
74
75/**
76 * Validate signature and return a pointer to the parameter table. If the
77 * signature is invalid, call panic() and never return.
78 *
79 * @return pointer to the parameter table if signature matched or never return.
80 */
81struct spl_machine_param *spl_get_machine_params(void);
82
83#endif /* __ASM_ARCH_EXYNOS_SPL_H__ */