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Sandeep Paulraj2d4072c2009-08-15 11:20:58 -04001/*
Sandeep Paulraja4474ff2009-10-13 19:35:11 -04002 * Copyright (C) 2009 Texas Instruments Incorporated
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -04003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040022
23/* Spectrum Digital TMS320DM365 EVM board */
24#define DAVINCI_DM365EVM
25
26#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040027#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
28#define CONFIG_SYS_CONSOLE_INFO_QUIET
29
30/* SoC Configuration */
31#define CONFIG_ARM926EJS /* arm926ejs CPU */
32#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
33#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
34#define CONFIG_SYS_HZ 1000
35#define CONFIG_SOC_DM365
Nagabhushana Netagunte98c19af2011-09-03 22:13:02 -040036#define CONFIG_SYS_ICACHE_OFF
37#define CONFIG_SYS_DCACHE_OFF
38#define CONFIG_SYS_L2CACHE_OFF
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040039
40/* Memory Info */
41#define CONFIG_NR_DRAM_BANKS 1
42#define PHYS_SDRAM_1 0x80000000
Sandeep Paulraja16df2c2009-09-08 17:09:52 -040043#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040044
45/* Serial Driver info: UART0 for console */
46#define CONFIG_SYS_NS16550
47#define CONFIG_SYS_NS16550_SERIAL
48#define CONFIG_SYS_NS16550_REG_SIZE -4
49#define CONFIG_SYS_NS16550_COM1 0x01c20000
50#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
51#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
52#define CONFIG_CONS_INDEX 1
53#define CONFIG_BAUDRATE 115200
54
55/* EEPROM definitions for EEPROM on DM365 EVM */
56#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
57#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
58#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
59#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
60
61/* Network Configuration */
62#define CONFIG_DRIVER_TI_EMAC
Prakash PMe6441c42010-06-22 10:24:43 -040063#define CONFIG_EMAC_MDIO_PHY_NUM 0
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040064#define CONFIG_MII
65#define CONFIG_BOOTP_DEFAULT
66#define CONFIG_BOOTP_DNS
67#define CONFIG_BOOTP_DNS2
68#define CONFIG_BOOTP_SEND_HOSTNAME
69#define CONFIG_NET_RETRY_COUNT 10
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040070
71/* I2C */
72#define CONFIG_HARD_I2C
73#define CONFIG_DRIVER_DAVINCI_I2C
74#define CONFIG_SYS_I2C_SPEED 400000
75#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
76
77/* NAND: socketed, two chipselects, normally 2 GBytes */
78#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050079#define CONFIG_SYS_NAND_CS 2
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -040080#define CONFIG_SYS_NAND_USE_FLASH_BBT
81#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
82#define CONFIG_SYS_NAND_PAGE_2K
83
84#define CONFIG_SYS_NAND_LARGEPAGE
85#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
86/* socket has two chipselects, nCE0 gated by address BIT(14) */
87#define CONFIG_SYS_MAX_NAND_DEVICE 1
88#define CONFIG_SYS_NAND_MAX_CHIPS 2
89
Sandeep Paulraje3e4e2f2010-12-18 18:15:25 -050090/* SD/MMC */
91#define CONFIG_MMC
92#define CONFIG_GENERIC_MMC
93#define CONFIG_DAVINCI_MMC
94#define CONFIG_DAVINCI_MMC_SD1
95#define CONFIG_MMC_MBLOCK
96
Prathap Srinivas6e20e642010-01-11 15:36:46 +053097#define PINMUX4_USBDRVBUS_BITCLEAR 0x3000
98#define PINMUX4_USBDRVBUS_BITSET 0x2000
99
100/* USB Configuration */
101#define CONFIG_USB_DAVINCI
102#define CONFIG_MUSB_HCD
103
104#ifdef CONFIG_USB_DAVINCI
105#define CONFIG_CMD_USB /* include support for usb */
106#define CONFIG_CMD_STORAGE /* include support for usb */
107#define CONFIG_CMD_FAT /* include support for FAT/storage*/
108#define CONFIG_DOS_PARTITION /* include support for FAT/storage*/
109#endif
110
111#ifdef CONFIG_MUSB_HCD /* include support for usb host */
112#define CONFIG_CMD_USB /* include support for usb cmd */
113#define CONFIG_USB_STORAGE /* MSC class support */
114#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */
115#define CONFIG_CMD_FAT /* inclue support for FAT/storage */
116#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */
117
118#ifdef CONFIG_USB_KEYBOARD /* HID class support */
119#define CONFIG_SYS_USB_EVENT_POLL
120
121#define CONFIG_PREBOOT "usb start"
122#endif /* CONFIG_USB_KEYBOARD */
123#endif /* CONFIG_MUSB_HCD */
124
125#ifdef CONFIG_MUSB_UDC
126#define CONFIG_USB_DEVICE 1
127#define CONFIG_USB_TTY 1
128#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
129#define CONFIG_USBD_VENDORID 0x0451
130#define CONFIG_USBD_PRODUCTID 0x5678
131#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
132#define CONFIG_USBD_PRODUCT_NAME "DM365VM"
133#endif /* CONFIG_MUSB_UDC */
134
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400135/* U-Boot command configuration */
136#include <config_cmd_default.h>
137
138#undef CONFIG_CMD_BDI
139#undef CONFIG_CMD_FLASH
140#undef CONFIG_CMD_FPGA
141#undef CONFIG_CMD_SETGETDCR
142
143#define CONFIG_CMD_ASKENV
144#define CONFIG_CMD_DHCP
145#define CONFIG_CMD_I2C
146#define CONFIG_CMD_PING
147#define CONFIG_CMD_SAVES
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400148
Sandeep Paulraje3e4e2f2010-12-18 18:15:25 -0500149#ifdef CONFIG_MMC
150#define CONFIG_DOS_PARTITION
151#define CONFIG_CMD_EXT2
152#define CONFIG_CMD_FAT
153#define CONFIG_CMD_MMC
154#endif
155
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400156#ifdef CONFIG_NAND_DAVINCI
157#define CONFIG_CMD_MTDPARTS
158#define CONFIG_MTD_PARTITIONS
159#define CONFIG_MTD_DEVICE
160#define CONFIG_CMD_NAND
161#define CONFIG_CMD_UBI
162#define CONFIG_RBTREE
163#endif
164
165#define CONFIG_CRC32_VERIFY
166#define CONFIG_MX_CYCLIC
167
168/* U-Boot general configuration */
169#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
170#define CONFIG_BOOTFILE "uImage" /* Boot file name */
Rajashekhara, Sudhakare7b20972011-09-03 22:13:04 -0400171#define CONFIG_SYS_PROMPT "DM36x EVM # " /* Monitor Command Prompt */
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400172#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
173#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
174 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
175#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
176#define CONFIG_SYS_HUSH_PARSER
177#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
178#define CONFIG_SYS_LONGHELP
179
180#ifdef CONFIG_NAND_DAVINCI
Sandeep Paulraja16df2c2009-09-08 17:09:52 -0400181#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400182#define CONFIG_ENV_IS_IN_NAND
183#define CONFIG_ENV_OFFSET 0x3C0000
184#undef CONFIG_ENV_IS_IN_FLASH
185#endif
186
Sandeep Paulraje3e4e2f2010-12-18 18:15:25 -0500187#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
188#define CONFIG_CMD_ENV
189#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
190#define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
191#define CONFIG_ENV_IS_IN_MMC
192#undef CONFIG_ENV_IS_IN_FLASH
193#endif
194
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400195#define CONFIG_BOOTDELAY 3
196#define CONFIG_BOOTCOMMAND \
197 "dhcp;bootm"
198#define CONFIG_BOOTARGS \
199 "console=ttyS0,115200n8 " \
200 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
201
202#define CONFIG_CMDLINE_EDITING
203#define CONFIG_VERSION_VARIABLE
204#define CONFIG_TIMESTAMP
205
206/* U-Boot memory configuration */
Sandeep Paulraja16df2c2009-09-08 17:09:52 -0400207#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
208#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400209#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
210#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
211
212/* Linux interfacing */
213#define CONFIG_CMDLINE_TAG
214#define CONFIG_SETUP_MEMORY_TAGS
215#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
216#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
217
218
219/* NAND configuration issocketed with two chipselects just like the DM355 EVM.
220 * It normally comes with a 2GByte SLC part with 2KB pages
221 * (and 128KB erase blocks); other
222 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
223 * pretty much demands the 4-bit ECC support.) You can of course swap in
224 * other parts, including small page ones.
225 */
226#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
227
228#ifdef CONFIG_SYS_NAND_LARGEPAGE
229/* Use same layout for 128K/256K blocks; allow some bad blocks */
230#define PART_BOOT "2m(bootloader)ro,"
231#else
232/* Assume 16K erase blocks; allow a few bad ones. */
233#define PART_BOOT "512k(bootloader)ro,"
234#endif
235
236#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
237#define PART_REST "-(filesystem)"
238
239#define MTDPARTS_DEFAULT \
240 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
241
Sandeep Paulraj47fefac2010-11-27 18:50:22 -0500242#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
243
244#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
245#define CONFIG_SYS_INIT_SP_ADDR \
246 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
247
Sandeep Paulraj2d4072c2009-08-15 11:20:58 -0400248#endif /* __CONFIG_H */