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Stefano Babiceae49882011-01-20 08:05:15 +00001/*
2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7 *
8 * Configuration for the MX35pdk Freescale board.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#include <asm/arch/imx-regs.h>
30
31 /* High Level Configuration Options */
32#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
33#define CONFIG_MX35
34#define CONFIG_MX35_HCLK_FREQ 24000000
35
36#define CONFIG_DISPLAY_CPUINFO
37#define CONFIG_DISPLAY_BOARDINFO
38
39/* Set TEXT at the beginning of the NOR flash */
40#define CONFIG_SYS_TEXT_BASE 0xA0000000
41
42#define CONFIG_SYS_64BIT_VSPRINTF
43
44#define CONFIG_BOARD_EARLY_INIT_F
45#define BOARD_LATE_INIT
46
47#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48#define CONFIG_REVISION_TAG
49#define CONFIG_SETUP_MEMORY_TAGS
50#define CONFIG_INITRD_TAG
51
52/*
53 * Size of malloc() pool
54 */
55#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
56
57/*
58 * Hardware drivers
59 */
60#define CONFIG_HARD_I2C
61#define CONFIG_I2C_MXC
62#define CONFIG_SYS_I2C_MX35_PORT1
63#define CONFIG_SYS_I2C_SPEED 100000
64#define CONFIG_SYS_I2C_SLAVE 0xfe
65#define CONFIG_MXC_SPI
Stefano Babica4adedd2011-08-21 11:00:32 +020066#define CONFIG_MXC_GPIO
Stefano Babiceae49882011-01-20 08:05:15 +000067
68
69/*
70 * PMIC Configs
71 */
72#define CONFIG_FSL_PMIC
73#define CONFIG_FSL_PMIC_I2C
74#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
75
76/*
77 * MFD MC9SDZ60
78 */
79#define CONFIG_FSL_MC9SDZ60
80#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
81
82/*
83 * UART (console)
84 */
85#define CONFIG_MXC_UART
86#define CONFIG_SYS_MX35_UART1
87
88/* allow to overwrite serial and ethaddr */
89#define CONFIG_ENV_OVERWRITE
90#define CONFIG_CONS_INDEX 1
91#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
93
94/*
95 * Command definition
96 */
97
98#include <config_cmd_default.h>
99
100#define CONFIG_CMD_PING
101#define CONFIG_CMD_DHCP
102#define CONFIG_BOOTP_SUBNETMASK
103#define CONFIG_BOOTP_GATEWAY
104#define CONFIG_BOOTP_DNS
105
106#define CONFIG_CMD_NAND
107
108#define CONFIG_CMD_I2C
109#define CONFIG_CMD_SPI
110#define CONFIG_CMD_MII
111#define CONFIG_CMD_NET
112#define CONFIG_NET_RETRY_COUNT 100
113
114#define CONFIG_BOOTDELAY 3
115
116#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
117
118/*
119 * Ethernet on the debug board (SMC911)
120 */
121#define CONFIG_SMC911X
122#define CONFIG_SMC911X_16_BIT 1
123#define CONFIG_SMC911X_BASE CS5_BASE_ADDR
124
125#define CONFIG_HAS_ETH1
Stefano Babiceae49882011-01-20 08:05:15 +0000126#define CONFIG_ETHPRIME
127
128/*
129 * Ethernet on SOC (FEC)
130 */
131#define CONFIG_FEC_MXC
132#define IMX_FEC_BASE FEC_BASE_ADDR
133#define CONFIG_FEC_MXC_PHYADDR 0x1F
134
135#define CONFIG_MII
136#define CONFIG_DISCOVER_PHY
137
138#define CONFIG_ARP_TIMEOUT 200UL
139
140/*
141 * Miscellaneous configurable options
142 */
143#define CONFIG_SYS_LONGHELP /* undef to save memory */
144#define CONFIG_SYS_PROMPT "MX35 U-Boot > "
145#define CONFIG_CMDLINE_EDITING
146#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
147#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
148
149#define CONFIG_AUTO_COMPLETE
150#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
151/* Print Buffer Size */
152#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
153#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
154#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
155
156#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
157#define CONFIG_SYS_MEMTEST_END 0x10000
158
159#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
160
161#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
162
163#define CONFIG_SYS_HZ 1000
164
165
166/*
167 * Stack sizes
168 *
169 * The stack sizes are set up in start.S using the settings below
170 */
171#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
172
173/*
174 * Physical Memory Map
175 */
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200176#define CONFIG_NR_DRAM_BANKS 2
Stefano Babiceae49882011-01-20 08:05:15 +0000177#define PHYS_SDRAM_1 CSD0_BASE_ADDR
178#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200179#define PHYS_SDRAM_2 CSD1_BASE_ADDR
180#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
Stefano Babiceae49882011-01-20 08:05:15 +0000181
182#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
183#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
184#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
185#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
186 GENERATED_GBL_DATA_SIZE)
187#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
188 CONFIG_SYS_GBL_DATA_OFFSET)
189
190/*
191 * MTD Command for mtdparts
192 */
193#define CONFIG_CMD_MTDPARTS
194#define CONFIG_MTD_DEVICE
195#define CONFIG_FLASH_CFI_MTD
196#define CONFIG_MTD_PARTITIONS
197#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
198#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
199 "96m(root),8m(cfg),1938m(user);" \
200 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
201
202/*
203 * FLASH and environment organization
204 */
205#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
206#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
207#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
208/* Monitor at beginning of flash */
209#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
210#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
211
212#define CONFIG_ENV_SECT_SIZE (128 * 1024)
213#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
214
215/* Address and size of Redundant Environment Sector */
216#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
217#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
218
219#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
220 CONFIG_SYS_MONITOR_LEN)
221
222#define CONFIG_ENV_IS_IN_FLASH
223
224#if defined(CONFIG_FSL_ENV_IN_NAND)
225 #define CONFIG_ENV_IS_IN_NAND
226 #define CONFIG_ENV_OFFSET (1024 * 1024)
227#endif
228
229/*
230 * CFI FLASH driver setup
231 */
232#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
233#define CONFIG_FLASH_CFI_DRIVER
234
235/* A non-standard buffered write algorithm */
236#define CONFIG_FLASH_SPANSION_S29WS_N
237#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
238#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
239
240/*
241 * NAND FLASH driver setup
242 */
243#define CONFIG_NAND_MXC
244#define CONFIG_NAND_MXC_V1_1
245#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
246#define CONFIG_SYS_MAX_NAND_DEVICE 1
247#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
248#define CONFIG_MXC_NAND_HWECC
249#define CONFIG_SYS_NAND_LARGEPAGE
250
251/*
252 * Default environment and default scripts
253 * to update uboot and load kernel
254 */
255#define xstr(s) str(s)
256#define str(s) #s
257
258#define CONFIG_HOSTNAME "mx35pdk"
259#define CONFIG_EXTRA_ENV_SETTINGS \
260 "netdev=eth1\0" \
261 "ethprime=smc911x\0" \
262 "nfsargs=setenv bootargs root=/dev/nfs rw " \
263 "nfsroot=${serverip}:${rootpath}\0" \
264 "ramargs=setenv bootargs root=/dev/ram rw\0" \
265 "addip_sta=setenv bootargs ${bootargs} " \
266 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
267 ":${hostname}:${netdev}:off panic=1\0" \
268 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
269 "addip=if test -n ${ipdyn};then run addip_dyn;" \
270 "else run addip_sta;fi\0" \
271 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
272 "addtty=setenv bootargs ${bootargs}" \
273 " console=ttymxc0,${baudrate}\0" \
274 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
275 "loadaddr=80800000\0" \
276 "kernel_addr_r=80800000\0" \
277 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
278 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
279 "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \
280 "flash_self=run ramargs addip addtty addmtd addmisc;" \
281 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
282 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
283 "bootm ${kernel_addr}\0" \
284 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
285 "run nfsargs addip addtty addmtd addmisc;" \
286 "bootm ${kernel_addr_r}\0" \
287 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
288 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
289 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
290 "load=tftp ${loadaddr} ${u-boot}\0" \
291 "uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \
292 "update=protect off ${uboot_addr} +40000;" \
293 "erase ${uboot_addr} +40000;" \
294 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
295 "upd=if run load;then echo Updating u-boot;if run update;" \
296 "then echo U-Boot updated;" \
297 "else echo Error updating u-boot !;" \
298 "echo Board without bootloader !!;" \
299 "fi;" \
300 "else echo U-Boot not downloaded..exiting;fi\0" \
301 "bootcmd=run net_nfs\0"
302
303#endif /* __CONFIG_H */