| Bin Meng | 58f542d | 2014-12-17 15:50:40 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 3 | # |
| 4 | # SPDX-License-Identifier: GPL-2.0+ |
| 5 | # |
| 6 | |
| 7 | config INTEL_QUEENSBAY |
| 8 | bool |
| 9 | select HAVE_FSP |
| 10 | select HAVE_CMC |
| 11 | |
| 12 | if INTEL_QUEENSBAY |
| 13 | |
| 14 | config HAVE_FSP |
| 15 | bool "Add an Firmware Support Package binary" |
| 16 | help |
| 17 | Select this option to add an Firmware Support Package binary to |
| 18 | the resulting U-Boot image. It is a binary blob which U-Boot uses |
| 19 | to set up SDRAM and other chipset specific initialization. |
| 20 | |
| 21 | Note: Without this binary U-Boot will not be able to set up its |
| 22 | SDRAM so will not boot. |
| 23 | |
| 24 | config FSP_FILE |
| 25 | string "Firmware Support Package binary filename" |
| 26 | depends on HAVE_FSP |
| 27 | default "fsp.bin" |
| 28 | help |
| 29 | The filename of the file to use as Firmware Support Package binary |
| 30 | in the board directory. |
| 31 | |
| 32 | config FSP_LOCATION |
| 33 | hex "Firmware Support Package binary location" |
| 34 | depends on HAVE_FSP |
| 35 | default 0xfffc0000 |
| 36 | help |
| 37 | FSP is not Position Independent Code (PIC) and the whole FSP has to |
| 38 | be rebased if it is placed at a location which is different from the |
| 39 | perferred base address specified during the FSP build. Use Intel's |
| 40 | Binary Configuration Tool (BCT) to do the rebase. |
| 41 | |
| 42 | The default base address of 0xfffc0000 indicates that the binary must |
| 43 | be located at offset 0xc0000 from the beginning of a 1MB flash device. |
| 44 | |
| 45 | config FSP_TEMP_RAM_ADDR |
| 46 | hex |
| 47 | default 0x2000000 |
| 48 | help |
| 49 | Stack top address which is used in FspInit after DRAM is ready and |
| 50 | CAR is disabled. |
| 51 | |
| 52 | config HAVE_CMC |
| 53 | bool "Add a Chipset Micro Code state machine binary" |
| 54 | help |
| 55 | Select this option to add a Chipset Micro Code state machine binary |
| 56 | to the resulting U-Boot image. It is a 64K data block of machine |
| 57 | specific code which must be put in the flash for the processor to |
| 58 | access when powered up before system BIOS is executed. |
| 59 | |
| 60 | config CMC_FILE |
| 61 | string "Chipset Micro Code state machine filename" |
| 62 | depends on HAVE_CMC |
| 63 | default "cmc.bin" |
| 64 | help |
| 65 | The filename of the file to use as Chipset Micro Code state machine |
| 66 | binary in the board directory. |
| 67 | |
| 68 | config CMC_LOCATION |
| 69 | hex "Chipset Micro Code state machine binary location" |
| 70 | depends on HAVE_CMC |
| 71 | default 0xfffb0000 |
| 72 | help |
| 73 | The location of the CMC binary is determined by a strap. It must be |
| 74 | put in flash at a location matching the strap-determined base address. |
| 75 | |
| 76 | The default base address of 0xfffb0000 indicates that the binary must |
| 77 | be located at offset 0xb0000 from the beginning of a 1MB flash device. |
| 78 | |
| 79 | endif |