blob: 72d52c58188e71c902e2dbe5141053ce3791fc15 [file] [log] [blame]
Wenyou Yang9e5935c2016-07-20 17:55:12 +08001/*
2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <clk-uclass.h>
10#include <dm/device.h>
11#include <dm/lists.h>
12#include <dm/root.h>
Heiko Stübner27326c72017-02-18 19:46:21 +010013#include <dm/util.h>
Wenyou Yang9e5935c2016-07-20 17:55:12 +080014#include "pmc.h"
15
16DECLARE_GLOBAL_DATA_PTR;
17
Wenyou Yang9e5935c2016-07-20 17:55:12 +080018static const struct udevice_id at91_pmc_match[] = {
Wenyou Yang3fea8092017-04-14 14:53:24 +080019 { .compatible = "atmel,at91rm9200-pmc" },
20 { .compatible = "atmel,at91sam9260-pmc" },
21 { .compatible = "atmel,at91sam9g45-pmc" },
22 { .compatible = "atmel,at91sam9n12-pmc" },
23 { .compatible = "atmel,at91sam9x5-pmc" },
24 { .compatible = "atmel,sama5d3-pmc" },
Wenyou Yang9e5935c2016-07-20 17:55:12 +080025 { .compatible = "atmel,sama5d2-pmc" },
26 {}
27};
28
29U_BOOT_DRIVER(at91_pmc) = {
Wenyou Yangb892b052016-09-13 10:25:55 +080030 .name = "at91-pmc",
31 .id = UCLASS_SIMPLE_BUS,
Wenyou Yang9e5935c2016-07-20 17:55:12 +080032 .of_match = at91_pmc_match,
Wenyou Yang9e5935c2016-07-20 17:55:12 +080033};
34
Wenyou Yang6cadaa02016-09-27 11:00:29 +080035/*---------------------------------------------------------*/
36
Wenyou Yang9e5935c2016-07-20 17:55:12 +080037int at91_pmc_core_probe(struct udevice *dev)
38{
39 struct pmc_platdata *plat = dev_get_platdata(dev);
40
41 dev = dev_get_parent(dev);
42
43 plat->reg_base = (struct at91_pmc *)dev_get_addr_ptr(dev);
44
45 return 0;
46}
47
Wenyou Yang6cadaa02016-09-27 11:00:29 +080048/**
49 * at91_clk_sub_device_bind() - for the at91 clock driver
50 * Recursively bind its children as clk devices.
51 *
52 * @return: 0 on success, or negative error code on failure
53 */
54int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)
Wenyou Yang9e5935c2016-07-20 17:55:12 +080055{
56 const void *fdt = gd->fdt_blob;
Simon Glasse160f7d2017-01-17 16:52:55 -070057 int offset = dev_of_offset(dev);
Wenyou Yang6cadaa02016-09-27 11:00:29 +080058 bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC);
Wenyou Yang9e5935c2016-07-20 17:55:12 +080059 const char *name;
60 int ret;
61
62 for (offset = fdt_first_subnode(fdt, offset);
63 offset > 0;
64 offset = fdt_next_subnode(fdt, offset)) {
Wenyou Yang6cadaa02016-09-27 11:00:29 +080065 if (pre_reloc_only &&
Heiko Stübner27326c72017-02-18 19:46:21 +010066 !dm_fdt_pre_reloc(fdt, offset))
Wenyou Yang6cadaa02016-09-27 11:00:29 +080067 continue;
68 /*
69 * If this node has "compatible" property, this is not
70 * a clock sub-node, but a normal device. skip.
71 */
72 fdt_get_property(fdt, offset, "compatible", &ret);
73 if (ret >= 0)
74 continue;
75
76 if (ret != -FDT_ERR_NOTFOUND)
77 return ret;
78
Wenyou Yang9e5935c2016-07-20 17:55:12 +080079 name = fdt_get_name(fdt, offset, NULL);
80 if (!name)
81 return -EINVAL;
Wenyou Yang6cadaa02016-09-27 11:00:29 +080082 ret = device_bind_driver_to_node(dev, drv_name, name,
Wenyou Yang9e5935c2016-07-20 17:55:12 +080083 offset, NULL);
84 if (ret)
85 return ret;
86 }
87
88 return 0;
89}
90
Wenyou Yang6cadaa02016-09-27 11:00:29 +080091int at91_clk_of_xlate(struct clk *clk, struct fdtdec_phandle_args *args)
92{
93 int periph;
94
95 if (args->args_count) {
96 debug("Invalid args_count: %d\n", args->args_count);
97 return -EINVAL;
98 }
99
Simon Glasse160f7d2017-01-17 16:52:55 -0700100 periph = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(clk->dev), "reg",
101 -1);
Wenyou Yang6cadaa02016-09-27 11:00:29 +0800102 if (periph < 0)
103 return -EINVAL;
104
105 clk->id = periph;
106
107 return 0;
108}
109
110int at91_clk_probe(struct udevice *dev)
111{
112 struct udevice *dev_periph_container, *dev_pmc;
113 struct pmc_platdata *plat = dev_get_platdata(dev);
114
115 dev_periph_container = dev_get_parent(dev);
116 dev_pmc = dev_get_parent(dev_periph_container);
117
118 plat->reg_base = (struct at91_pmc *)dev_get_addr_ptr(dev_pmc);
119
120 return 0;
121}