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Sricharana9c1c042011-11-15 09:50:06 -05001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
5 *
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
8 *
9 * Configuration settings for the TI EVM5430 board.
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef __CONFIG_H
31#define __CONFIG_H
32
33/*
34 * High Level Configuration Options
35 */
36#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
37#define CONFIG_OMAP /* in a TI OMAP core */
38#define CONFIG_OMAP54XX /* which is a 54XX */
39#define CONFIG_OMAP5430 /* which is in a 5430 */
40#define CONFIG_5430EVM /* working with EVM */
Marek Vasut308252a2012-07-21 05:02:23 +000041#define CONFIG_OMAP_GPIO
Sricharana9c1c042011-11-15 09:50:06 -050042
43/* Get CPU defs */
44#include <asm/arch/cpu.h>
45#include <asm/arch/omap.h>
46
47/* Display CPU and Board Info */
48#define CONFIG_DISPLAY_CPUINFO
49#define CONFIG_DISPLAY_BOARDINFO
50
51/* Clock Defines */
SRICHARAN R7a4bf202012-03-12 02:25:44 +000052#define V_OSCK 19200000 /* Clock output from T2 */
Sricharana9c1c042011-11-15 09:50:06 -050053#define V_SCLK V_OSCK
54
Sricharana9c1c042011-11-15 09:50:06 -050055#define CONFIG_MISC_INIT_R
56
57#define CONFIG_OF_LIBFDT
58
59#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
60#define CONFIG_SETUP_MEMORY_TAGS
61#define CONFIG_INITRD_TAG
62
63/*
64 * Size of malloc() pool
65 * Total Size Environment - 128k
66 * Malloc - add 256k
67 */
68#define CONFIG_ENV_SIZE (128 << 10)
69#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
70/* Vector Base */
71#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
72
73/*
74 * Hardware drivers
75 */
76
77/*
78 * serial port - NS16550 compatible
79 */
80#define V_NS16550_CLK 48000000
81
82#define CONFIG_SYS_NS16550
83#define CONFIG_SYS_NS16550_SERIAL
84#define CONFIG_SYS_NS16550_REG_SIZE (-4)
85#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
86#define CONFIG_CONS_INDEX 3
87#define CONFIG_SYS_NS16550_COM3 UART3_BASE
88
89#define CONFIG_BAUDRATE 115200
90#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
91 115200}
92/* I2C */
93#define CONFIG_HARD_I2C
94#define CONFIG_SYS_I2C_SPEED 100000
95#define CONFIG_SYS_I2C_SLAVE 1
96#define CONFIG_DRIVER_OMAP34XX_I2C
97#define CONFIG_I2C_MULTI_BUS
98
SRICHARAN R21144292012-03-12 02:25:48 +000099/* TWL6035 */
100#ifndef CONFIG_SPL_BUILD
101#define CONFIG_TWL6035_POWER
102#endif
103
Sricharana9c1c042011-11-15 09:50:06 -0500104/* MMC */
105#define CONFIG_GENERIC_MMC
106#define CONFIG_MMC
107#define CONFIG_OMAP_HSMMC
108#define CONFIG_DOS_PARTITION
109
110/* MMC ENV related defines */
111#define CONFIG_ENV_IS_IN_MMC
112#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
113#define CONFIG_ENV_OFFSET 0xE0000
Balaji T K328aeca2012-03-12 02:25:50 +0000114#define CONFIG_CMD_SAVEENV
Sricharana9c1c042011-11-15 09:50:06 -0500115
Sricharana9c1c042011-11-15 09:50:06 -0500116#define CONFIG_SYS_CONSOLE_IS_IN_ENV
117
118/* Flash */
119#define CONFIG_SYS_NO_FLASH
120
121/* Cache */
122#define CONFIG_SYS_CACHELINE_SIZE 64
123#define CONFIG_SYS_CACHELINE_SHIFT 6
124
125/* commands to include */
126#include <config_cmd_default.h>
127
128/* Enabled commands */
129#define CONFIG_CMD_EXT2 /* EXT2 Support */
130#define CONFIG_CMD_FAT /* FAT support */
131#define CONFIG_CMD_I2C /* I2C serial bus support */
132#define CONFIG_CMD_MMC /* MMC support */
133#define CONFIG_CMD_SAVEENV
134
135/* Disabled commands */
136#undef CONFIG_CMD_NET
137#undef CONFIG_CMD_NFS
138#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
139#undef CONFIG_CMD_IMLS /* List all found images */
140
141/*
142 * Environment setup
143 */
144
145#define CONFIG_BOOTDELAY 3
146
147#define CONFIG_ENV_OVERWRITE
148
149#define CONFIG_EXTRA_ENV_SETTINGS \
150 "loadaddr=0x82000000\0" \
SRICHARAN R7a4bf202012-03-12 02:25:44 +0000151 "console=ttyO2,115200n8\0" \
Sricharana9c1c042011-11-15 09:50:06 -0500152 "usbtty=cdc_acm\0" \
153 "vram=16M\0" \
154 "mmcdev=0\0" \
155 "mmcroot=/dev/mmcblk0p2 rw\0" \
156 "mmcrootfstype=ext3 rootwait\0" \
157 "mmcargs=setenv bootargs console=${console} " \
158 "vram=${vram} " \
159 "root=${mmcroot} " \
160 "rootfstype=${mmcrootfstype}\0" \
161 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
162 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
163 "source ${loadaddr}\0" \
164 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
165 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
166 "run mmcargs; " \
167 "bootm ${loadaddr}\0" \
168
169#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000170 "mmc dev ${mmcdev}; if mmc rescan; then " \
Sricharana9c1c042011-11-15 09:50:06 -0500171 "if run loadbootscript; then " \
172 "run bootscript; " \
173 "else " \
174 "if run loaduimage; then " \
175 "run mmcboot; " \
176 "fi; " \
177 "fi; " \
178 "fi"
179
180#define CONFIG_AUTO_COMPLETE 1
181
182/*
183 * Miscellaneous configurable options
184 */
185
186#define CONFIG_SYS_LONGHELP /* undef to save memory */
187#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Sricharana9c1c042011-11-15 09:50:06 -0500188#define CONFIG_SYS_PROMPT "OMAP5430 EVM # "
189#define CONFIG_SYS_CBSIZE 256
190/* Print Buffer Size */
191#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
192 sizeof(CONFIG_SYS_PROMPT) + 16)
193#define CONFIG_SYS_MAXARGS 16
194/* Boot Argument Buffer Size */
195#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
196
197/*
198 * memtest setup
199 */
200#define CONFIG_SYS_MEMTEST_START 0x80000000
201#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
202
203/* Default load address */
204#define CONFIG_SYS_LOAD_ADDR 0x80000000
205
206/* Use General purpose timer 1 */
207#define CONFIG_SYS_TIMERBASE GPT2_BASE
208#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
209#define CONFIG_SYS_HZ 1000
210
211/*
Sricharana9c1c042011-11-15 09:50:06 -0500212 * SDRAM Memory Map
213 * Even though we use two CS all the memory
214 * is mapped to one contiguous block
215 */
216#define CONFIG_NR_DRAM_BANKS 1
217
218#define CONFIG_SYS_SDRAM_BASE 0x80000000
Tom Rini41aebf82012-08-08 17:03:10 -0700219#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Sricharana9c1c042011-11-15 09:50:06 -0500220 GENERATED_GBL_DATA_SIZE)
221
222#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
223
224/* Defines for SDRAM init */
225#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
226#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
227#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
228#endif
229
230/* Defines for SPL */
231#define CONFIG_SPL
Tom Rini47f7bca2012-08-13 12:03:19 -0700232#define CONFIG_SPL_FRAMEWORK
SRICHARAN R7a4bf202012-03-12 02:25:44 +0000233#define CONFIG_SPL_TEXT_BASE 0x40300350
234#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
Tom Rini41aebf82012-08-08 17:03:10 -0700235#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Tom Rini861a86f2012-08-13 11:37:56 -0700236#define CONFIG_SPL_DISPLAY_PRINT
Sricharana9c1c042011-11-15 09:50:06 -0500237
Sricharana9c1c042011-11-15 09:50:06 -0500238#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
239#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
240#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
241#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
242
243#define CONFIG_SPL_LIBCOMMON_SUPPORT
244#define CONFIG_SPL_LIBDISK_SUPPORT
245#define CONFIG_SPL_I2C_SUPPORT
246#define CONFIG_SPL_MMC_SUPPORT
247#define CONFIG_SPL_FAT_SUPPORT
248#define CONFIG_SPL_LIBGENERIC_SUPPORT
249#define CONFIG_SPL_SERIAL_SUPPORT
Thomas Weberd1df0fd2012-05-14 10:28:54 +0000250#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
Sricharana9c1c042011-11-15 09:50:06 -0500251
252/*
Sricharana9c1c042011-11-15 09:50:06 -0500253 * 64 bytes before this address should be set aside for u-boot.img's
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000254 * header. That is 80E7FFC0--0x80E80000 should not be used for any
Sricharana9c1c042011-11-15 09:50:06 -0500255 * other needs.
256 */
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000257#define CONFIG_SYS_TEXT_BASE 0x80E80000
258
259/*
260 * BSS and malloc area 64MB into memory to allow enough
261 * space for the kernel at the beginning of memory
262 */
263#define CONFIG_SPL_BSS_START_ADDR 0x84000000
264#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
265#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
266#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Sricharana9c1c042011-11-15 09:50:06 -0500267
268#endif /* __CONFIG_H */