| wdenk | 5b1d713 | 2002-11-03 00:07:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Dave Ellis, SIXNET, dge@sixnetio.com |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | Using the Motorola MPC8XXFADS development board |
| 25 | =============================================== |
| 26 | |
| 27 | CONFIGURATIONS |
| 28 | -------------- |
| 29 | |
| 30 | There are ready-to-use default configurations available for the |
| 31 | FADS823, FADS850SAR and FADS860T. The FADS860T configuration also |
| 32 | works for the 855T processor. |
| 33 | |
| 34 | LOADING U-Boot INTO FADS FLASH MEMORY |
| 35 | -------------------------------------- |
| 36 | |
| 37 | MPC8BUG can load U-Boot into the FLASH memory using LOADF. |
| 38 | |
| 39 | loadf u-boot.srec 100000 |
| 40 | |
| 41 | |
| 42 | STARTING U-Boot FROM MPC8BUG |
| 43 | ----------------------------- |
| 44 | |
| 45 | To start U-Boot from MPC8BUG: |
| 46 | |
| 47 | 1. Reset the board: |
| 48 | reset :h |
| 49 | |
| 50 | 2. Change BR0 and OR0 back to their values at reset: |
| 51 | rms memc br0 00000001 |
| 52 | rms memc or0 00000d34 |
| 53 | |
| 54 | 3. Modify DER so MPC8BUG gets control only when it should: |
| 55 | rms der 2002000f |
| 56 | |
| 57 | 4. Start as if from reset: |
| 58 | go 100 |
| 59 | |
| 60 | This is NOT exactly the same as starting U-Boot without |
| 61 | MPC8BUG. MPC8BUG turns off the watchdog as part of the hard reset. |
| 62 | After it does the reset it writes SYPCR (to disable the watchdog) |
| 63 | and sets BR0 and OR0 to map the FLASH at 0x02800000 (and does lots |
| 64 | of other initialization). That is why it is necessary to set BR0 |
| 65 | and OR0 to map the FLASH everywhere. U-Boot can't turn on the |
| 66 | watchdog after that, since MPC8BUG has used the only chance to write |
| 67 | to SYPCR. |
| 68 | |
| 69 | Here is a bizarre sequence of MPC8BUG and U-Boot commands that lets |
| 70 | U-Boot write to SYPCR. It works with MPC8BUG 1.5 and an 855T |
| 71 | processor (your mileage may vary). It is probably better (and a lot |
| 72 | easier) just to accept having the watchdog disabled when the debug |
| 73 | cable is connected. |
| 74 | |
| 75 | in MPC8BUG: |
| 76 | reset :h |
| 77 | rms memc br0 00000001 |
| 78 | rms memc or0 00000d34 |
| 79 | rms der 2000f |
| 80 | go 100 |
| 81 | |
| 82 | Now U-Boot is running with the MPC8BUG value for SYPCR. Use the |
| 83 | U-Boot 'reset' command to reset the board. |
| 84 | =>reset |
| 85 | Next, in MPC8BUG: |
| 86 | rms der 2000f |
| 87 | go |
| 88 | |
| 89 | Now U-Boot is running with the U-Boot value for SYPCR. |