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wdenk3f85ce22004-02-23 16:11:30 +00001/*
2 * Copyright (c) 2004 Picture Elements, Inc.
3 * Stephen Williams (XXXXXXXXXXXXXXXX)
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk3f85ce22004-02-23 16:11:30 +00006 */
wdenk3f85ce22004-02-23 16:11:30 +00007
8/*
9 * The Xilinx SystemACE chip support is activated by defining
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020010 * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE
wdenk3f85ce22004-02-23 16:11:30 +000011 * to set the base address of the device. This code currently
12 * assumes that the chip is connected via a byte-wide bus.
13 *
14 * The CONFIG_SYSTEMACE also adds to fat support the device class
15 * "ace" that allows the user to execute "fatls ace 0" and the
16 * like. This works by making the systemace_get_dev function
17 * available to cmd_fat.c:get_dev and filling in a block device
18 * description that has all the bits needed for FAT support to
19 * read sectors.
Wolfgang Denk8f79e4c2005-08-10 15:14:32 +020020 *
Wolfgang Denkfe599e12005-08-07 23:55:50 +020021 * According to Xilinx technical support, before accessing the
22 * SystemACE CF you need to set the following control bits:
Grant Likely984618f2007-02-20 09:05:16 +010023 * FORCECFGMODE : 1
24 * CFGMODE : 0
25 * CFGSTART : 0
wdenk3f85ce22004-02-23 16:11:30 +000026 */
27
Grant Likely984618f2007-02-20 09:05:16 +010028#include <common.h>
29#include <command.h>
30#include <systemace.h>
31#include <part.h>
32#include <asm/io.h>
wdenk3f85ce22004-02-23 16:11:30 +000033
wdenk3f85ce22004-02-23 16:11:30 +000034/*
35 * The ace_readw and writew functions read/write 16bit words, but the
36 * offset value is the BYTE offset as most used in the Xilinx
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020037 * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined
wdenk3f85ce22004-02-23 16:11:30 +000038 * to be the base address for the chip, usually in the local
39 * peripheral bus.
40 */
wdenk3f85ce22004-02-23 16:11:30 +000041
Michal Simek5340a7f2012-07-04 12:09:45 +020042static u32 base = CONFIG_SYS_SYSTEMACE_BASE;
43static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;
44
45static void ace_writew(u16 val, unsigned off)
46{
47 if (width == 8) {
48#if !defined(__BIG_ENDIAN)
49 writeb(val >> 8, base + off);
50 writeb(val, base + off + 1);
51#else
52 writeb(val, base + off);
53 writeb(val >> 8, base + off + 1);
54#endif
Alexey Brodkin7cde9f32013-01-03 13:35:23 +040055 } else
56 out16(base + off, val);
Michal Simek5340a7f2012-07-04 12:09:45 +020057}
58
59static u16 ace_readw(unsigned off)
60{
61 if (width == 8) {
62#if !defined(__BIG_ENDIAN)
63 return (readb(base + off) << 8) | readb(base + off + 1);
64#else
65 return readb(base + off) | (readb(base + off + 1) << 8);
66#endif
67 }
68
69 return in16(base + off);
70}
wdenk3f85ce22004-02-23 16:11:30 +000071
Simon Glass4101f682016-02-29 15:25:34 -070072static unsigned long systemace_read(struct blk_desc *block_dev,
Stephen Warren7c4213f2015-12-07 11:38:48 -070073 unsigned long start, lbaint_t blkcnt,
74 void *buffer);
wdenk3f85ce22004-02-23 16:11:30 +000075
Simon Glass4101f682016-02-29 15:25:34 -070076static struct blk_desc systemace_dev = { 0 };
wdenk3f85ce22004-02-23 16:11:30 +000077
78static int get_cf_lock(void)
79{
Grant Likely984618f2007-02-20 09:05:16 +010080 int retry = 10;
wdenk3f85ce22004-02-23 16:11:30 +000081
82 /* CONTROLREG = LOCKREG */
Grant Likely984618f2007-02-20 09:05:16 +010083 unsigned val = ace_readw(0x18);
84 val |= 0x0002;
85 ace_writew((val & 0xffff), 0x18);
wdenk3f85ce22004-02-23 16:11:30 +000086
87 /* Wait for MPULOCK in STATUSREG[15:0] */
Grant Likely984618f2007-02-20 09:05:16 +010088 while (!(ace_readw(0x04) & 0x0002)) {
wdenk3f85ce22004-02-23 16:11:30 +000089
Grant Likely984618f2007-02-20 09:05:16 +010090 if (retry < 0)
91 return -1;
wdenk3f85ce22004-02-23 16:11:30 +000092
Grant Likely984618f2007-02-20 09:05:16 +010093 udelay(100000);
94 retry -= 1;
95 }
wdenk3f85ce22004-02-23 16:11:30 +000096
Grant Likely984618f2007-02-20 09:05:16 +010097 return 0;
wdenk3f85ce22004-02-23 16:11:30 +000098}
99
100static void release_cf_lock(void)
101{
Grant Likely984618f2007-02-20 09:05:16 +0100102 unsigned val = ace_readw(0x18);
103 val &= ~(0x0002);
104 ace_writew((val & 0xffff), 0x18);
wdenk3f85ce22004-02-23 16:11:30 +0000105}
106
Matthew McClintockdf3fc522011-05-24 05:31:19 +0000107#ifdef CONFIG_PARTITIONS
Simon Glass4101f682016-02-29 15:25:34 -0700108struct blk_desc *systemace_get_dev(int dev)
wdenk3f85ce22004-02-23 16:11:30 +0000109{
110 /* The first time through this, the systemace_dev object is
111 not yet initialized. In that case, fill it in. */
Grant Likely984618f2007-02-20 09:05:16 +0100112 if (systemace_dev.blksz == 0) {
113 systemace_dev.if_type = IF_TYPE_UNKNOWN;
114 systemace_dev.dev = 0;
115 systemace_dev.part_type = PART_TYPE_UNKNOWN;
116 systemace_dev.type = DEV_TYPE_HARDDISK;
117 systemace_dev.blksz = 512;
Egbert Eich0472fbf2013-04-09 21:11:56 +0000118 systemace_dev.log2blksz = LOG2(systemace_dev.blksz);
Grant Likely984618f2007-02-20 09:05:16 +0100119 systemace_dev.removable = 1;
120 systemace_dev.block_read = systemace_read;
Wolfgang Denkfe599e12005-08-07 23:55:50 +0200121
Stefan Roesed93e2212007-02-20 13:17:42 +0100122 /*
Stefan Roese8274ec02007-02-22 07:40:23 +0100123 * Ensure the correct bus mode (8/16 bits) gets enabled
Stefan Roesed93e2212007-02-20 13:17:42 +0100124 */
Michal Simek5340a7f2012-07-04 12:09:45 +0200125 ace_writew(width == 8 ? 0 : 0x0001, 0);
Stefan Roesed93e2212007-02-20 13:17:42 +0100126
Simon Glass3e8bd462016-02-29 15:25:48 -0700127 part_init(&systemace_dev);
Wolfgang Denkfe599e12005-08-07 23:55:50 +0200128
Grant Likely984618f2007-02-20 09:05:16 +0100129 }
wdenk3f85ce22004-02-23 16:11:30 +0000130
Grant Likely984618f2007-02-20 09:05:16 +0100131 return &systemace_dev;
wdenk3f85ce22004-02-23 16:11:30 +0000132}
Matthew McClintockdf3fc522011-05-24 05:31:19 +0000133#endif
wdenk3f85ce22004-02-23 16:11:30 +0000134
135/*
136 * This function is called (by dereferencing the block_read pointer in
137 * the dev_desc) to read blocks of data. The return value is the
138 * number of blocks read. A zero return indicates an error.
139 */
Simon Glass4101f682016-02-29 15:25:34 -0700140static unsigned long systemace_read(struct blk_desc *block_dev,
Stephen Warren7c4213f2015-12-07 11:38:48 -0700141 unsigned long start, lbaint_t blkcnt,
142 void *buffer)
wdenk3f85ce22004-02-23 16:11:30 +0000143{
Grant Likely984618f2007-02-20 09:05:16 +0100144 int retry;
145 unsigned blk_countdown;
Grant Likelyeb867a72007-02-20 09:05:45 +0100146 unsigned char *dp = buffer;
Grant Likely984618f2007-02-20 09:05:16 +0100147 unsigned val;
wdenk3f85ce22004-02-23 16:11:30 +0000148
Grant Likely984618f2007-02-20 09:05:16 +0100149 if (get_cf_lock() < 0) {
150 unsigned status = ace_readw(0x04);
wdenk3f85ce22004-02-23 16:11:30 +0000151
Grant Likely984618f2007-02-20 09:05:16 +0100152 /* If CFDETECT is false, card is missing. */
153 if (!(status & 0x0010)) {
154 printf("** CompactFlash card not present. **\n");
155 return 0;
156 }
wdenk3f85ce22004-02-23 16:11:30 +0000157
Grant Likely984618f2007-02-20 09:05:16 +0100158 printf("**** ACE locked away from me (STATUSREG=%04x)\n",
159 status);
160 return 0;
161 }
wdenke7c85682004-02-27 08:21:54 +0000162#ifdef DEBUG_SYSTEMACE
Grant Likely984618f2007-02-20 09:05:16 +0100163 printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
wdenke7c85682004-02-27 08:21:54 +0000164#endif
165
Grant Likely984618f2007-02-20 09:05:16 +0100166 retry = 2000;
167 for (;;) {
168 val = ace_readw(0x04);
wdenk3f85ce22004-02-23 16:11:30 +0000169
Grant Likely984618f2007-02-20 09:05:16 +0100170 /* If CFDETECT is false, card is missing. */
171 if (!(val & 0x0010)) {
172 printf("**** ACE CompactFlash not found.\n");
173 release_cf_lock();
174 return 0;
175 }
wdenk3f85ce22004-02-23 16:11:30 +0000176
Grant Likely984618f2007-02-20 09:05:16 +0100177 /* If RDYFORCMD, then we are ready to go. */
178 if (val & 0x0100)
179 break;
wdenk3f85ce22004-02-23 16:11:30 +0000180
Grant Likely984618f2007-02-20 09:05:16 +0100181 if (retry < 0) {
182 printf("**** SystemACE not ready.\n");
183 release_cf_lock();
184 return 0;
185 }
wdenk3f85ce22004-02-23 16:11:30 +0000186
Grant Likely984618f2007-02-20 09:05:16 +0100187 udelay(1000);
188 retry -= 1;
189 }
wdenk3f85ce22004-02-23 16:11:30 +0000190
wdenke7c85682004-02-27 08:21:54 +0000191 /* The SystemACE can only transfer 256 sectors at a time, so
192 limit the current chunk of sectors. The blk_countdown
193 variable is the number of sectors left to transfer. */
wdenk3f85ce22004-02-23 16:11:30 +0000194
Grant Likely984618f2007-02-20 09:05:16 +0100195 blk_countdown = blkcnt;
196 while (blk_countdown > 0) {
197 unsigned trans = blk_countdown;
wdenk3f85ce22004-02-23 16:11:30 +0000198
Grant Likely984618f2007-02-20 09:05:16 +0100199 if (trans > 256)
200 trans = 256;
wdenk3f85ce22004-02-23 16:11:30 +0000201
wdenke7c85682004-02-27 08:21:54 +0000202#ifdef DEBUG_SYSTEMACE
Grant Likely984618f2007-02-20 09:05:16 +0100203 printf("... transfer %lu sector in a chunk\n", trans);
wdenke7c85682004-02-27 08:21:54 +0000204#endif
Grant Likely984618f2007-02-20 09:05:16 +0100205 /* Write LBA block address */
206 ace_writew((start >> 0) & 0xffff, 0x10);
Stefan Roesed93e2212007-02-20 13:17:42 +0100207 ace_writew((start >> 16) & 0x0fff, 0x12);
wdenk3f85ce22004-02-23 16:11:30 +0000208
Grant Likely984618f2007-02-20 09:05:16 +0100209 /* NOTE: in the Write Sector count below, a count of 0
210 causes a transfer of 256, so &0xff gives the right
211 value for whatever transfer count we want. */
wdenke7c85682004-02-27 08:21:54 +0000212
Grant Likely984618f2007-02-20 09:05:16 +0100213 /* Write sector count | ReadMemCardData. */
214 ace_writew((trans & 0xff) | 0x0300, 0x14);
wdenke7c85682004-02-27 08:21:54 +0000215
Wolfgang Denkd62f64c2007-05-16 00:13:33 +0200216/*
Michal Simek32556442007-04-21 21:07:22 +0200217 * For FPGA configuration via SystemACE is reset unacceptable
218 * CFGDONE bit in STATUSREG is not set to 1.
219 */
220#ifndef SYSTEMACE_CONFIG_FPGA
Grant Likely984618f2007-02-20 09:05:16 +0100221 /* Reset the configruation controller */
222 val = ace_readw(0x18);
223 val |= 0x0080;
224 ace_writew(val, 0x18);
Michal Simek32556442007-04-21 21:07:22 +0200225#endif
Wolfgang Denkfe599e12005-08-07 23:55:50 +0200226
Grant Likely984618f2007-02-20 09:05:16 +0100227 retry = trans * 16;
228 while (retry > 0) {
229 int idx;
wdenke7c85682004-02-27 08:21:54 +0000230
Grant Likely984618f2007-02-20 09:05:16 +0100231 /* Wait for buffer to become ready. */
232 while (!(ace_readw(0x04) & 0x0020)) {
233 udelay(100);
234 }
wdenke7c85682004-02-27 08:21:54 +0000235
Grant Likely984618f2007-02-20 09:05:16 +0100236 /* Read 16 words of 2bytes from the sector buffer. */
237 for (idx = 0; idx < 16; idx += 1) {
238 unsigned short val = ace_readw(0x40);
239 *dp++ = val & 0xff;
240 *dp++ = (val >> 8) & 0xff;
241 }
wdenke7c85682004-02-27 08:21:54 +0000242
Grant Likely984618f2007-02-20 09:05:16 +0100243 retry -= 1;
244 }
wdenk3f85ce22004-02-23 16:11:30 +0000245
Grant Likely984618f2007-02-20 09:05:16 +0100246 /* Clear the configruation controller reset */
247 val = ace_readw(0x18);
248 val &= ~0x0080;
249 ace_writew(val, 0x18);
Wolfgang Denkfe599e12005-08-07 23:55:50 +0200250
Grant Likely984618f2007-02-20 09:05:16 +0100251 /* Count the blocks we transfer this time. */
252 start += trans;
253 blk_countdown -= trans;
254 }
wdenk3f85ce22004-02-23 16:11:30 +0000255
Grant Likely984618f2007-02-20 09:05:16 +0100256 release_cf_lock();
wdenk3f85ce22004-02-23 16:11:30 +0000257
Grant Likely984618f2007-02-20 09:05:16 +0100258 return blkcnt;
wdenk3f85ce22004-02-23 16:11:30 +0000259}