| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
| 4 | CONFIG_ARCH_ROCKCHIP=y |
| Simon Glass | 9846390 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 5 | CONFIG_TEXT_BASE=0x00200000 |
| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=1 |
| Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 7 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 8 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 |
| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 9 | CONFIG_ENV_OFFSET=0x3F8000 |
| 10 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-eaidk-610" |
| 11 | CONFIG_ROCKCHIP_RK3399=y |
| 12 | CONFIG_TARGET_EVB_RK3399=y |
| Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 13 | CONFIG_SPL_STACK=0x400000 |
| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 14 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 |
| 15 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 16 | CONFIG_SYS_LOAD_ADDR=0x800800 |
| 17 | CONFIG_DEBUG_UART=y |
| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 18 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-eaidk-610.dtb" |
| 19 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 20 | CONFIG_SPL_MAX_SIZE=0x2e000 |
| 21 | CONFIG_SPL_PAD_TO=0x7f8000 |
| 22 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 23 | CONFIG_SPL_BSS_START_ADDR=0x400000 |
| 24 | CONFIG_SPL_BSS_MAX_SIZE=0x2000 |
| 25 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 26 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 27 | CONFIG_SPL_STACK_R=y |
| 28 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 |
| 29 | CONFIG_TPL=y |
| 30 | CONFIG_CMD_BOOTZ=y |
| 31 | CONFIG_CMD_GPT=y |
| 32 | CONFIG_CMD_MMC=y |
| 33 | CONFIG_CMD_USB=y |
| 34 | # CONFIG_CMD_SETEXPR is not set |
| 35 | CONFIG_CMD_TIME=y |
| 36 | CONFIG_SPL_OF_CONTROL=y |
| 37 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 38 | CONFIG_ENV_IS_IN_MMC=y |
| 39 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 40 | CONFIG_ROCKCHIP_GPIO=y |
| 41 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 42 | CONFIG_MMC_DW=y |
| 43 | CONFIG_MMC_DW_ROCKCHIP=y |
| 44 | CONFIG_MMC_SDHCI=y |
| 45 | CONFIG_MMC_SDHCI_ROCKCHIP=y |
| 46 | CONFIG_ETH_DESIGNWARE=y |
| 47 | CONFIG_GMAC_ROCKCHIP=y |
| 48 | CONFIG_PMIC_RK8XX=y |
| 49 | CONFIG_REGULATOR_PWM=y |
| 50 | CONFIG_REGULATOR_RK8XX=y |
| 51 | CONFIG_PWM_ROCKCHIP=y |
| 52 | CONFIG_BAUDRATE=1500000 |
| 53 | CONFIG_DEBUG_UART_SHIFT=2 |
| Tom Rini | 9591b63 | 2022-12-04 09:39:03 -0500 | [diff] [blame] | 54 | CONFIG_SYS_NS16550_MEM32=y |
| Andy Yan | 25e9a63 | 2022-09-18 19:30:02 +0800 | [diff] [blame] | 55 | CONFIG_SYSRESET=y |
| 56 | CONFIG_USB=y |
| 57 | CONFIG_USB_XHCI_HCD=y |
| 58 | CONFIG_USB_XHCI_DWC3=y |
| 59 | CONFIG_USB_EHCI_HCD=y |
| 60 | CONFIG_USB_EHCI_GENERIC=y |
| 61 | CONFIG_SPL_TINY_MEMSET=y |
| 62 | CONFIG_ERRNO_STR=y |