Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / 3dab405b45e5089d42f59d01e3803fab8ac56fcf / . / configs / MPC837XERDB_defconfig
blob: efdddf7c2b3d5f1298d7ef785c8b01ad2b86aa92 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xFE000000
Tom Rini98021542021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x80000
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x4000
5CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini20ecfbe2021-03-02 09:36:23 -0500[diff] [blame]6CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]7CONFIG_SYS_CLK_FREQ=66666667
Tom Rinid46e86d2022-04-08 13:36:51 -0400[diff] [blame]8CONFIG_ENV_ADDR=0xFE080000
Tom Rini7856cd52021-12-12 22:12:32 -0500[diff] [blame]9# CONFIG_SYS_PCI_64BIT is not set
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]10CONFIG_MPC83xx=y
Mario Six93de2532019-01-21 09:17:56 +0100[diff] [blame]11CONFIG_HIGH_BATS=y
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]12CONFIG_TARGET_MPC837XERDB=y
Mario Six21c15022019-01-21 09:17:54 +0100[diff] [blame]13CONFIG_DDR_MC_CLOCK_MODE_1_1=y
14CONFIG_SYSTEM_PLL_FACTOR_5_1=y
15CONFIG_CORE_PLL_RATIO_2_1=y
16CONFIG_PCI_HOST_MODE_ENABLE=y
17CONFIG_PCI_INT_ARBITER1_ENABLE=y
18CONFIG_BOOT_MEMORY_SPACE_LOW=y
19CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
20CONFIG_TSEC1_MODE_RGMII=y
21CONFIG_TSEC2_MODE_RGMII=y
22CONFIG_LDP_PIN_MUX_STATE_0=y
Mario Six30915ab2019-01-21 09:17:57 +0100[diff] [blame]23CONFIG_BAT0=y
24CONFIG_BAT0_NAME="SDRAM_LOWER"
25CONFIG_BAT0_BASE=0x00000000
26CONFIG_BAT0_LENGTH_256_MBYTES=y
27CONFIG_BAT0_ACCESS_RW=y
28CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
29CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
30CONFIG_BAT0_USER_MODE_VALID=y
31CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
32CONFIG_BAT1=y
33CONFIG_BAT1_NAME="SDRAM_UPPER"
34CONFIG_BAT1_BASE=0x10000000
35CONFIG_BAT1_LENGTH_256_MBYTES=y
36CONFIG_BAT1_ACCESS_RW=y
37CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
38CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
39CONFIG_BAT1_USER_MODE_VALID=y
40CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
41CONFIG_BAT2=y
42CONFIG_BAT2_NAME="IMMR"
43CONFIG_BAT2_BASE=0xE0000000
44CONFIG_BAT2_LENGTH_8_MBYTES=y
45CONFIG_BAT2_ACCESS_RW=y
46CONFIG_BAT2_ICACHE_INHIBITED=y
47CONFIG_BAT2_ICACHE_GUARDED=y
48CONFIG_BAT2_DCACHE_INHIBITED=y
49CONFIG_BAT2_DCACHE_GUARDED=y
50CONFIG_BAT2_USER_MODE_VALID=y
51CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
52CONFIG_BAT3=y
53CONFIG_BAT3_NAME="L2_SWITCH"
54CONFIG_BAT3_BASE=0xF0000000
55CONFIG_BAT3_ACCESS_RW=y
56CONFIG_BAT3_ICACHE_INHIBITED=y
57CONFIG_BAT3_ICACHE_GUARDED=y
58CONFIG_BAT3_DCACHE_INHIBITED=y
59CONFIG_BAT3_DCACHE_GUARDED=y
60CONFIG_BAT3_USER_MODE_VALID=y
61CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
62CONFIG_BAT4=y
63CONFIG_BAT4_NAME="FLASH"
64CONFIG_BAT4_BASE=0xFE000000
65CONFIG_BAT4_LENGTH_32_MBYTES=y
66CONFIG_BAT4_ACCESS_RW=y
67CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
68CONFIG_BAT4_DCACHE_INHIBITED=y
69CONFIG_BAT4_DCACHE_GUARDED=y
70CONFIG_BAT4_USER_MODE_VALID=y
71CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
72CONFIG_BAT5=y
73CONFIG_BAT5_NAME="STACH_IN_DCACHE"
74CONFIG_BAT5_BASE=0xE6000000
75CONFIG_BAT5_ACCESS_RW=y
76CONFIG_BAT5_USER_MODE_VALID=y
77CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
78CONFIG_BAT6=y
79CONFIG_BAT6_NAME="PCI_MEM"
80CONFIG_BAT6_BASE=0x80000000
81CONFIG_BAT6_LENGTH_256_MBYTES=y
82CONFIG_BAT6_ACCESS_RW=y
83CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
84CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
85CONFIG_BAT6_USER_MODE_VALID=y
86CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
87CONFIG_BAT7=y
88CONFIG_BAT7_NAME="PCI_MMIO"
89CONFIG_BAT7_BASE=0x90000000
90CONFIG_BAT7_LENGTH_256_MBYTES=y
91CONFIG_BAT7_ACCESS_RW=y
92CONFIG_BAT7_ICACHE_INHIBITED=y
93CONFIG_BAT7_ICACHE_GUARDED=y
94CONFIG_BAT7_DCACHE_INHIBITED=y
95CONFIG_BAT7_DCACHE_GUARDED=y
96CONFIG_BAT7_USER_MODE_VALID=y
97CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
Mario Six9c5df7a2019-01-21 09:17:58 +0100[diff] [blame]98CONFIG_LBLAW0=y
99CONFIG_LBLAW0_BASE=0xFE000000
100CONFIG_LBLAW0_NAME="FLASH"
101CONFIG_LBLAW0_LENGTH_8_MBYTES=y
102CONFIG_LBLAW1=y
103CONFIG_LBLAW1_BASE=0xE0600000
104CONFIG_LBLAW1_NAME="NAND"
105CONFIG_LBLAW1_LENGTH_32_KBYTES=y
106CONFIG_LBLAW2=y
107CONFIG_LBLAW2_BASE=0xF0000000
108CONFIG_LBLAW2_NAME="VSC7385"
109CONFIG_LBLAW2_LENGTH_128_KBYTES=y
Tom Rini344a0e42019-05-26 14:45:25 -0400[diff] [blame]110CONFIG_ELBC_BR0_OR0=y
111CONFIG_BR0_OR0_NAME="FLASH"
112CONFIG_BR0_OR0_BASE=0xFE000000
113CONFIG_BR0_PORTSIZE_16BIT=y
114CONFIG_OR0_AM_8_MBYTES=y
115CONFIG_OR0_SCY_9=y
116CONFIG_OR0_XACS_EXTENDED=y
117CONFIG_OR0_EHTR_1_CYCLE=y
118CONFIG_OR0_EAD_EXTRA=y
119CONFIG_ELBC_BR1_OR1=y
120CONFIG_BR1_OR1_NAME="NAND"
121CONFIG_BR1_OR1_BASE=0xE0600000
122CONFIG_BR1_ERRORCHECKING_BOTH=y
123CONFIG_BR1_MACHINE_FCM=y
124CONFIG_OR1_SCY_1=y
125CONFIG_OR1_CSCT_8_CYCLE=y
126CONFIG_OR1_CST_ONE_CLOCK=y
127CONFIG_OR1_CHT_TWO_CLOCK=y
128CONFIG_OR1_TRLX_RELAXED=y
129CONFIG_OR1_EHTR_8_CYCLE=y
130CONFIG_ELBC_BR2_OR2=y
131CONFIG_BR2_OR2_NAME="VSC7385"
132CONFIG_BR2_OR2_BASE=0xF0000000
133CONFIG_OR2_AM_128_KBYTES=y
134CONFIG_OR2_SCY_15=y
135CONFIG_OR2_CSNT_EARLIER=y
136CONFIG_OR2_XACS_EXTENDED=y
137CONFIG_OR2_SETA_EXTERNAL=y
138CONFIG_OR2_TRLX_RELAXED=y
139CONFIG_OR2_EHTR_8_CYCLE=y
140CONFIG_OR2_EAD_EXTRA=y
Mario Sixbe5abb02019-01-21 09:18:09 +0100[diff] [blame]141CONFIG_HID0_FINAL_EMCP=y
142CONFIG_HID0_FINAL_ICE=y
143CONFIG_HID2_HBE=y
Mario Six73df96a2019-01-21 09:18:12 +0100[diff] [blame]144CONFIG_ACR_PIPE_DEP_4=y
145CONFIG_ACR_RPTCNT_4=y
Mario Sixe35012e2019-01-21 09:18:13 +0100[diff] [blame]146CONFIG_SPCR_TSECEP_3=y
Tom Rini344a0e42019-05-26 14:45:25 -0400[diff] [blame]147CONFIG_LCRR_DBYP_PLL_BYPASSED=y
148CONFIG_LCRR_CLKDIV_8=y
Simon Glass73223f02016-02-22 22:55:43 -0700[diff] [blame]149CONFIG_OF_BOARD_SETUP=y
150CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocherbb597c02016-06-07 08:31:14 +0200[diff] [blame]151CONFIG_BOOTDELAY=6
Sinan Akmanc8be85f2021-05-11 14:18:02 -0400[diff] [blame]152CONFIG_BOARD_LATE_INIT=y
Adam Ford8ccf98b2018-07-29 13:13:29 -0500[diff] [blame]153CONFIG_MISC_INIT_R=y
Sinan Akmanc8be85f2021-05-11 14:18:02 -0400[diff] [blame]154CONFIG_PCI_INIT_R=y
Tom Riniadad96e2016-04-21 21:37:19 -0400[diff] [blame]155CONFIG_HUSH_PARSER=y
Tom Rinid0ee7f22022-05-11 17:38:09 -0400[diff] [blame]156CONFIG_SYS_PBSIZE=276
Tuomas Tynkkynenad12dc12017-10-08 21:48:01 +0300[diff] [blame]157CONFIG_CMD_IMLS=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]158CONFIG_CMD_I2C=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]159CONFIG_CMD_MMC=y
Simon Glass6500ec72017-08-04 16:34:34 -0600[diff] [blame]160CONFIG_CMD_PCI=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]161CONFIG_CMD_SATA=y
162CONFIG_CMD_USB=y
Joe Hershbergeref0f2f52015-06-22 16:15:30 -0500[diff] [blame]163# CONFIG_CMD_SETEXPR is not set
Tom Rinia542e432022-02-25 11:19:50 -0500[diff] [blame]164CONFIG_BOOTP_BOOTFILESIZE=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]165CONFIG_CMD_MII=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]166CONFIG_CMD_PING=y
Chris Packhamc9032ce2017-04-29 15:20:28 +1200[diff] [blame]167CONFIG_CMD_DATE=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]168CONFIG_CMD_EXT2=y
169CONFIG_CMD_FAT=y
Sinan Akmana2c48cb2020-04-04 01:16:47 -0400[diff] [blame]170CONFIG_OF_CONTROL=y
Tom Rini20ecfbe2021-03-02 09:36:23 -0500[diff] [blame]171CONFIG_ENV_OVERWRITE=y
Tom Rinifdfb17b2022-02-25 11:19:48 -0500[diff] [blame]172CONFIG_USE_BOOTFILE=y
173CONFIG_BOOTFILE="uImage"
Tom Rini0e14cdf2022-03-11 09:12:07 -0500[diff] [blame]174CONFIG_USE_ETHPRIME=y
175CONFIG_ETHPRIME="TSEC0"
Sinan Akmana2c48cb2020-04-04 01:16:47 -0400[diff] [blame]176CONFIG_DM=y
Tuomas Tynkkynen9920d152017-12-08 15:36:17 +0200[diff] [blame]177CONFIG_FSL_SATA=y
Simon Glassedca8cf2022-01-31 07:49:37 -0700[diff] [blame]178CONFIG_SYS_SATA_MAX_DEVICE=2
Tom Rinic7fad782021-11-13 18:10:40 -0500[diff] [blame]179CONFIG_SYS_BR0_PRELIM_BOOL=y
180CONFIG_SYS_BR0_PRELIM=0xFE001001
181CONFIG_SYS_OR0_PRELIM=0xFF800193
182CONFIG_SYS_BR1_PRELIM_BOOL=y
183CONFIG_SYS_BR1_PRELIM=0xE0600C21
184CONFIG_SYS_OR1_PRELIM=0xFFFF8396
185CONFIG_SYS_BR2_PRELIM_BOOL=y
186CONFIG_SYS_BR2_PRELIM=0xF0000801
187CONFIG_SYS_OR2_PRELIM=0xFFFE09FF
Tom Rini55dabcc2021-08-18 23:12:24 -0400[diff] [blame]188CONFIG_SYS_I2C_LEGACY=y
Tom Rini6d5d0c92021-08-18 23:12:35 -0400[diff] [blame]189CONFIG_SYS_I2C_FSL=y
190CONFIG_SYS_FSL_I2C_OFFSET=0x3000
191CONFIG_SYS_I2C_SLAVE=0x7F
192CONFIG_SYS_I2C_SPEED=400000
Mario Six07dea2e2018-03-28 14:38:19 +0200[diff] [blame]193CONFIG_FSL_ESDHC=y
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900[diff] [blame]194CONFIG_MTD_NOR_FLASH=y
Adam Ford2fe88d42018-10-14 15:10:50 -0500[diff] [blame]195CONFIG_FLASH_CFI_DRIVER=y
196CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
197CONFIG_SYS_FLASH_PROTECTION=y
198CONFIG_SYS_FLASH_CFI=y
Sinan Akmanc8be85f2021-05-11 14:18:02 -0400[diff] [blame]199CONFIG_DM_ETH=y
200CONFIG_DM_MDIO=y
201CONFIG_DM_ETH_PHY=y
202CONFIG_RGMII=y
203CONFIG_MII=y
Mario Six17151052018-03-28 14:38:18 +0200[diff] [blame]204CONFIG_TSEC_ENET=y
Thomas Chou9e390032015-11-19 21:48:14 +0800[diff] [blame]205CONFIG_SYS_NS16550=y
Tom Rini645176d2016-09-08 16:31:26 -0400[diff] [blame]206CONFIG_USB=y
Tom Rini64d6ac52017-05-12 22:33:28 -0400[diff] [blame]207CONFIG_USB_EHCI_HCD=y
Tom Rinif76750d2021-12-11 14:55:51 -0500[diff] [blame]208CONFIG_USB_EHCI_FSL=y