blob: ad1167e2b65ad436824132eaf2d671b683d3151c [file] [log] [blame]
Simon Glass6854f872014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
28#include <errno.h>
29#include <malloc.h>
30#include <pci.h>
31#include <pci_rom.h>
32#include <vbe.h>
33#include <video_fb.h>
Bin Menga4520022015-07-06 16:31:36 +080034#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070035
Simon Glass6854f872014-11-14 20:56:33 -070036__weak bool board_should_run_oprom(pci_dev_t dev)
37{
38 return true;
39}
40
41static bool should_load_oprom(pci_dev_t dev)
42{
Simon Glass6854f872014-11-14 20:56:33 -070043 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
44 return 1;
45 if (board_should_run_oprom(dev))
46 return 1;
47
48 return 0;
49}
50
51__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
52{
53 return vendev;
54}
55
56static int pci_rom_probe(pci_dev_t dev, uint class,
57 struct pci_rom_header **hdrp)
58{
59 struct pci_rom_header *rom_header;
60 struct pci_rom_data *rom_data;
61 u16 vendor, device;
Simon Glass40305242014-12-29 19:32:23 -070062 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080063 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070064 u32 vendev;
65 u32 mapped_vendev;
66 u32 rom_address;
67
68 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
69 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
70 vendev = vendor << 16 | device;
71 mapped_vendev = board_map_oprom_vendev(vendev);
72 if (vendev != mapped_vendev)
73 debug("Device ID mapped to %#08x\n", mapped_vendev);
74
Bin Meng786a08e2015-07-06 16:31:33 +080075#ifdef CONFIG_VGA_BIOS_ADDR
76 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070077#else
Simon Glass4a2708a2015-01-14 21:37:04 -070078
Simon Glass6854f872014-11-14 20:56:33 -070079 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
80 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
81 debug("%s: rom_address=%x\n", __func__, rom_address);
82 return -ENOENT;
83 }
84
85 /* Enable expansion ROM address decoding. */
86 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
87 rom_address | PCI_ROM_ADDRESS_ENABLE);
88#endif
89 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +080090 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -070091
92 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -070093 le16_to_cpu(rom_header->signature),
94 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -070095
Simon Glass40305242014-12-29 19:32:23 -070096 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -070097 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -070098 le16_to_cpu(rom_header->signature));
Bin Mengf110da92015-07-08 13:06:41 +080099#ifndef CONFIG_VGA_BIOS_ADDR
100 /* Disable expansion ROM address decoding */
101 pci_write_config_dword(dev, PCI_ROM_ADDRESS, rom_address);
102#endif
Simon Glass6854f872014-11-14 20:56:33 -0700103 return -EINVAL;
104 }
105
Simon Glass40305242014-12-29 19:32:23 -0700106 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
107 rom_vendor = le16_to_cpu(rom_data->vendor);
108 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700109
110 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700111 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700112
113 /* If the device id is mapped, a mismatch is expected */
Simon Glass40305242014-12-29 19:32:23 -0700114 if ((vendor != rom_vendor || device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700115 (vendev == mapped_vendev)) {
116 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700117 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700118 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700119 }
120
Bin Mengd57c2f22015-04-24 15:48:03 +0800121 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
122 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
123 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700124
Bin Mengd57c2f22015-04-24 15:48:03 +0800125 if (class != rom_class) {
126 debug("Class Code mismatch ROM %06x, dev %06x\n",
127 rom_class, class);
Simon Glass6854f872014-11-14 20:56:33 -0700128 }
129 *hdrp = rom_header;
130
131 return 0;
132}
133
Bin Meng81d0b352015-04-24 15:48:04 +0800134int pci_rom_load(struct pci_rom_header *rom_header,
Simon Glass6854f872014-11-14 20:56:33 -0700135 struct pci_rom_header **ram_headerp)
136{
137 struct pci_rom_data *rom_data;
138 unsigned int rom_size;
139 unsigned int image_size = 0;
140 void *target;
141
142 do {
143 /* Get next image, until we see an x86 version */
144 rom_header = (struct pci_rom_header *)((void *)rom_header +
145 image_size);
146
147 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700148 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700149
Simon Glass40305242014-12-29 19:32:23 -0700150 image_size = le16_to_cpu(rom_data->ilen) * 512;
151 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700152
153 if (rom_data->type != 0)
154 return -EACCES;
155
156 rom_size = rom_header->size * 512;
157
Simon Glassbdc88d42014-12-29 19:32:24 -0700158#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700159 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700160#else
161 target = (void *)malloc(rom_size);
162 if (!target)
163 return -ENOMEM;
164#endif
Simon Glass6854f872014-11-14 20:56:33 -0700165 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700166 ulong start = get_timer(0);
167
Simon Glass6854f872014-11-14 20:56:33 -0700168 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
169 rom_header, target, rom_size);
170 memcpy(target, rom_header, rom_size);
171 if (memcmp(target, rom_header, rom_size)) {
172 printf("VGA ROM copy failed\n");
173 return -EFAULT;
174 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700175 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700176 }
177 *ram_headerp = target;
178
179 return 0;
180}
181
Bin Meng153e1dd2015-08-13 00:29:16 -0700182struct vbe_mode_info mode_info;
Simon Glass6854f872014-11-14 20:56:33 -0700183
184int vbe_get_video_info(struct graphic_device *gdev)
185{
186#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
187 struct vesa_mode_info *vesa = &mode_info.vesa;
188
189 gdev->winSizeX = vesa->x_resolution;
190 gdev->winSizeY = vesa->y_resolution;
191
192 gdev->plnSizeX = vesa->x_resolution;
193 gdev->plnSizeY = vesa->y_resolution;
194
195 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
196
197 switch (vesa->bits_per_pixel) {
Jian Luo0e98a142015-07-06 16:31:29 +0800198 case 32:
Simon Glass6854f872014-11-14 20:56:33 -0700199 case 24:
200 gdev->gdfIndex = GDF_32BIT_X888RGB;
201 break;
202 case 16:
203 gdev->gdfIndex = GDF_16BIT_565RGB;
204 break;
205 default:
206 gdev->gdfIndex = GDF__8BIT_INDEX;
207 break;
208 }
209
210 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
211 gdev->pciBase = vesa->phys_base_ptr;
212
213 gdev->frameAdrs = vesa->phys_base_ptr;
214 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
215
216 gdev->vprBase = vesa->phys_base_ptr;
217 gdev->cprBase = vesa->phys_base_ptr;
218
Simon Glass23609c72015-01-01 16:18:00 -0700219 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glass6854f872014-11-14 20:56:33 -0700220#else
221 return -ENOSYS;
222#endif
223}
224
Bin Menga4520022015-07-06 16:31:36 +0800225void setup_video(struct screen_info *screen_info)
226{
Bin Menga4520022015-07-06 16:31:36 +0800227 struct vesa_mode_info *vesa = &mode_info.vesa;
228
Bin Meng1e7a0472015-07-30 03:49:13 -0700229 /* Sanity test on VESA parameters */
230 if (!vesa->x_resolution || !vesa->y_resolution)
231 return;
232
Bin Menga4520022015-07-06 16:31:36 +0800233 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
234
235 screen_info->lfb_width = vesa->x_resolution;
236 screen_info->lfb_height = vesa->y_resolution;
237 screen_info->lfb_depth = vesa->bits_per_pixel;
238 screen_info->lfb_linelength = vesa->bytes_per_scanline;
239 screen_info->lfb_base = vesa->phys_base_ptr;
240 screen_info->lfb_size =
241 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
242 65536);
243 screen_info->lfb_size >>= 16;
244 screen_info->red_size = vesa->red_mask_size;
245 screen_info->red_pos = vesa->red_mask_pos;
246 screen_info->green_size = vesa->green_mask_size;
247 screen_info->green_pos = vesa->green_mask_pos;
248 screen_info->blue_size = vesa->blue_mask_size;
249 screen_info->blue_pos = vesa->blue_mask_pos;
250 screen_info->rsvd_size = vesa->reserved_mask_size;
251 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Menga4520022015-07-06 16:31:36 +0800252}
253
Simon Glassbc17d8f2015-01-27 22:13:34 -0700254int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700255{
256 struct pci_rom_header *rom, *ram;
257 int vesa_mode = -1;
Bin Mengd57c2f22015-04-24 15:48:03 +0800258 uint class;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700259 bool emulate;
Simon Glass6854f872014-11-14 20:56:33 -0700260 int ret;
261
262 /* Only execute VGA ROMs */
Bin Mengd57c2f22015-04-24 15:48:03 +0800263 pci_read_config_dword(dev, PCI_REVISION_ID, &class);
264 if (((class >> 16) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
Simon Glass6854f872014-11-14 20:56:33 -0700265 debug("%s: Class %#x, should be %#x\n", __func__, class,
266 PCI_CLASS_DISPLAY_VGA);
267 return -ENODEV;
268 }
Bin Mengd57c2f22015-04-24 15:48:03 +0800269 class >>= 8;
Simon Glass6854f872014-11-14 20:56:33 -0700270
271 if (!should_load_oprom(dev))
272 return -ENXIO;
273
274 ret = pci_rom_probe(dev, class, &rom);
275 if (ret)
276 return ret;
277
Bin Meng81d0b352015-04-24 15:48:04 +0800278 ret = pci_rom_load(rom, &ram);
Simon Glass6854f872014-11-14 20:56:33 -0700279 if (ret)
280 return ret;
281
282 if (!board_should_run_oprom(dev))
283 return -ENXIO;
284
285#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
286 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
287 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
288#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700289 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700290
291 if (exec_method & PCI_ROM_USE_NATIVE) {
292#ifdef CONFIG_X86
293 emulate = false;
294#else
295 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
296 printf("BIOS native execution is only available on x86\n");
297 return -ENOSYS;
298 }
299 emulate = true;
300#endif
301 } else {
302#ifdef CONFIG_BIOSEMU
303 emulate = true;
304#else
305 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
306 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
307 return -ENOSYS;
308 }
309 emulate = false;
310#endif
311 }
312
Simon Glass6854f872014-11-14 20:56:33 -0700313 if (emulate) {
314#ifdef CONFIG_BIOSEMU
315 BE_VGAInfo *info;
316
317 ret = biosemu_setup(dev, &info);
318 if (ret)
319 return ret;
320 biosemu_set_interrupt_handler(0x15, int15_handler);
321 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
322 vesa_mode, &mode_info);
323 if (ret)
324 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700325#endif
326 } else {
327#ifdef CONFIG_X86
328 bios_set_interrupt_handler(0x15, int15_handler);
329
330 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
331 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700332#endif
333 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700334 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glass6854f872014-11-14 20:56:33 -0700335
336 return 0;
337}