Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ZYNQ=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x4000000 |
Michal Simek | 52b36fd | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 4 | CONFIG_SPL_STACK_R_ADDR=0x200000 |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 5 | CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn-myir" |
| 6 | CONFIG_DEBUG_UART=y |
Michal Simek | a587051 | 2018-01-09 19:31:16 +0100 | [diff] [blame] | 7 | CONFIG_DISTRO_DEFAULTS=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 8 | CONFIG_FIT=y |
| 9 | CONFIG_FIT_SIGNATURE=y |
| 10 | CONFIG_FIT_VERBOSE=y |
Michal Simek | 83144cd | 2018-01-09 17:41:37 +0100 | [diff] [blame] | 11 | CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 12 | # CONFIG_DISPLAY_CPUINFO is not set |
| 13 | CONFIG_SPL=y |
Michal Simek | 52b36fd | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 14 | CONFIG_SPL_STACK_R=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 15 | CONFIG_SPL_OS_BOOT=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 16 | CONFIG_SYS_PROMPT="Zynq> " |
Simon Glass | 9b92a8d | 2017-08-04 16:34:57 -0600 | [diff] [blame] | 17 | CONFIG_CMD_THOR_DOWNLOAD=y |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 18 | CONFIG_CMD_DFU=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 19 | # CONFIG_CMD_FLASH is not set |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 20 | CONFIG_CMD_GPIO=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 21 | CONFIG_CMD_MMC=y |
| 22 | CONFIG_CMD_SF=y |
| 23 | CONFIG_CMD_USB=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 24 | # CONFIG_CMD_SETEXPR is not set |
| 25 | CONFIG_CMD_TFTPPUT=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 26 | CONFIG_CMD_CACHE=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 27 | CONFIG_CMD_EXT4_WRITE=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 28 | CONFIG_NET_RANDOM_ETHADDR=y |
| 29 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 30 | CONFIG_DFU_MMC=y |
| 31 | CONFIG_DFU_RAM=y |
Michal Simek | 7fad612 | 2017-11-03 15:53:56 +0100 | [diff] [blame] | 32 | CONFIG_FPGA_XILINX=y |
Vipul Kumar | 3990c9d | 2018-02-16 18:02:51 +0530 | [diff] [blame^] | 33 | CONFIG_FPGA_ZYNQPL=y |
Michal Simek | 93561a3 | 2018-01-09 15:27:31 +0100 | [diff] [blame] | 34 | CONFIG_DM_GPIO=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 35 | CONFIG_MMC_SDHCI=y |
| 36 | CONFIG_MMC_SDHCI_ZYNQ=y |
| 37 | CONFIG_SPI_FLASH=y |
| 38 | CONFIG_SPI_FLASH_BAR=y |
| 39 | CONFIG_SPI_FLASH_SPANSION=y |
| 40 | CONFIG_SPI_FLASH_STMICRO=y |
| 41 | CONFIG_SPI_FLASH_WINBOND=y |
Vipul Kumar | 77217c4 | 2018-01-24 10:51:30 +0530 | [diff] [blame] | 42 | CONFIG_PHY_MARVELL=y |
| 43 | CONFIG_PHY_REALTEK=y |
| 44 | CONFIG_PHY_XILINX=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 45 | CONFIG_ZYNQ_GEM=y |
| 46 | CONFIG_DEBUG_UART_ZYNQ=y |
| 47 | CONFIG_DEBUG_UART_BASE=0xe0001000 |
| 48 | CONFIG_DEBUG_UART_CLOCK=50000000 |
Michal Simek | 809704e | 2017-11-06 09:16:05 +0100 | [diff] [blame] | 49 | CONFIG_ZYNQ_SERIAL=y |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 50 | CONFIG_ZYNQ_QSPI=y |
| 51 | CONFIG_USB=y |
| 52 | CONFIG_USB_EHCI_HCD=y |
| 53 | CONFIG_USB_ULPI_VIEWPORT=y |
| 54 | CONFIG_USB_ULPI=y |
| 55 | CONFIG_USB_STORAGE=y |
| 56 | CONFIG_USB_GADGET=y |
Maxime Ripard | a95aee6 | 2017-09-07 08:58:08 +0200 | [diff] [blame] | 57 | CONFIG_USB_GADGET_MANUFACTURER="Xilinx" |
| 58 | CONFIG_USB_GADGET_VENDOR_NUM=0x03FD |
| 59 | CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 |
Alexander Graf | 584dc40 | 2017-07-03 13:41:36 +0200 | [diff] [blame] | 60 | CONFIG_CI_UDC=y |
| 61 | CONFIG_USB_GADGET_DOWNLOAD=y |
Lukasz Majewski | c6c1ca1 | 2018-01-29 19:30:18 +0100 | [diff] [blame] | 62 | CONFIG_USB_FUNCTION_THOR=y |