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Simon Glasse2e947f2015-08-30 16:55:42 -06001/*
2 * Google Veyron Jerry Rev 3+ board device tree source
3 *
4 * Copyright 2014 Google, Inc
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9/dts-v1/;
10#include "rk3288-veyron-chromebook.dtsi"
11#include "cros-ec-sbs.dtsi"
12
13/ {
14 model = "Google Jerry";
15 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
16 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
17 "google,veyron-jerry-rev3", "google,veyron-jerry",
18 "google,veyron", "rockchip,rk3288";
19
20 chosen {
21 stdout-path = &uart2;
22 };
23
Simon Glass32384742017-05-31 17:57:26 -060024 panel_regulator: panel-regulator {
Simon Glasse2e947f2015-08-30 16:55:42 -060025 compatible = "regulator-fixed";
26 enable-active-high;
27 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&lcd_enable_h>;
30 regulator-name = "panel_regulator";
31 vin-supply = <&vcc33_sys>;
32 };
33
34 vcc18_lcd: vcc18-lcd {
35 compatible = "regulator-fixed";
36 enable-active-high;
37 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&avdd_1v8_disp_en>;
40 regulator-name = "vcc18_lcd";
41 regulator-always-on;
42 regulator-boot-on;
43 vin-supply = <&vcc18_wl>;
44 };
45
46 backlight_regulator: backlight-regulator {
47 compatible = "regulator-fixed";
48 enable-active-high;
49 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&bl_pwr_en>;
52 regulator-name = "backlight_regulator";
53 vin-supply = <&vcc33_sys>;
54 startup-delay-us = <15000>;
55 };
56};
57
Simon Glassaede3ac2016-11-13 14:22:12 -070058&dmc {
59 rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa
60 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
61 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
62 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
63 0x5 0x0>;
64 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
65 0xa60 0x40 0x10 0x0>;
66 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
67};
68
Simon Glasse2e947f2015-08-30 16:55:42 -060069&gpio_keys {
70 power {
71 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
72 };
73};
74
75&backlight {
76 power-supply = <&backlight_regulator>;
77};
78
79&panel {
80 power-supply= <&panel_regulator>;
81};
82
83&rk808 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
86 dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
87 <&gpio7 15 GPIO_ACTIVE_HIGH>;
88
89 regulators {
90 mic_vcc: LDO_REG2 {
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
95 regulator-name = "mic_vcc";
96 regulator-suspend-mem-disabled;
97 };
98 };
99};
100
101&sdmmc {
102 pinctrl-names = "default";
103 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
104 &sdmmc_bus4>;
105 disable-wp;
106};
107
108&vcc_5v {
109 enable-active-high;
110 gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&drv_5v>;
113};
114
115&vcc50_hdmi {
116 enable-active-high;
117 gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&vcc50_hdmi_en>;
120};
121
Simon Glasse2e947f2015-08-30 16:55:42 -0600122&edp {
123 pinctrl-names = "default";
124 pinctrl-0 = <&edp_hpd>;
125};
126
127&pinctrl {
128 backlight {
129 bl_pwr_en: bl_pwr_en {
130 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
131 };
132 };
133
134 buck-5v {
135 drv_5v: drv-5v {
136 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
137 };
138 };
139
140 edp {
141 edp_hpd: edp_hpd {
142 rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
143 };
144 };
145
146 emmc {
147 /* Make sure eMMC is not in reset */
148 emmc_deassert_reset: emmc-deassert-reset {
149 rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
150 };
151 };
152
153 hdmi {
154 vcc50_hdmi_en: vcc50-hdmi-en {
155 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
156 };
157 };
158
159 lcd {
160 lcd_enable_h: lcd-en {
161 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
162 };
163
164 avdd_1v8_disp_en: avdd-1v8-disp-en {
165 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
166 };
167 };
168
169 pmic {
170 dvs_1: dvs-1 {
171 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
172 };
173
174 dvs_2: dvs-2 {
175 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
176 };
177 };
178};
179
180&i2c4 {
181 status = "okay";
182
183 /*
184 * Trackpad pin control is shared between Elan and Synaptics devices
185 * so we have to pull it up to the bus level.
186 */
187 pinctrl-names = "default";
188 pinctrl-0 = <&i2c4_xfer &trackpad_int>;
189
190 trackpad@15 {
191 compatible = "elan,i2c_touchpad";
192 interrupt-parent = <&gpio7>;
193 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
194 /*
195 * Remove the inherited pinctrl settings to avoid clashing
196 * with bus-wide ones.
197 */
198 /delete-property/pinctrl-names;
199 /delete-property/pinctrl-0;
200 reg = <0x15>;
201 vcc-supply = <&vcc33_io>;
202 wakeup-source;
203 };
204
205 trackpad@2c {
206 compatible = "hid-over-i2c";
207 interrupt-parent = <&gpio7>;
208 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
209 reg = <0x2c>;
210 hid-descr-addr = <0x0020>;
211 vcc-supply = <&vcc33_io>;
212 wakeup-source;
213 };
214};