blob: 07b1bdd0829be2a5b79fefd8d6d7face88b6a901 [file] [log] [blame]
David Brownell28b00322009-05-15 23:48:37 +02001/*
2 * Copyright (C) 2009 David Brownell
3 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02004 * SPDX-License-Identifier: GPL-2.0+
David Brownell28b00322009-05-15 23:48:37 +02005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
David Brownell28b00322009-05-15 23:48:37 +02009
10/* Spectrum Digital TMS320DM355 EVM board */
11#define DAVINCI_DM355EVM
12
13#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
David Brownell28b00322009-05-15 23:48:37 +020014#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
15#define CONFIG_SYS_CONSOLE_INFO_QUIET
David Brownell28b00322009-05-15 23:48:37 +020016
17/* SoC Configuration */
18#define CONFIG_ARM926EJS /* arm926ejs CPU */
19#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
20#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
21#define CONFIG_SYS_HZ 1000
22#define CONFIG_SOC_DM355
23
24/* Memory Info */
25#define CONFIG_NR_DRAM_BANKS 1
26#define PHYS_SDRAM_1 0x80000000
Sandeep Paulraja16df2c2009-09-08 17:09:52 -040027#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
David Brownell28b00322009-05-15 23:48:37 +020028
29/* Serial Driver info: UART0 for console */
30#define CONFIG_SYS_NS16550
31#define CONFIG_SYS_NS16550_SERIAL
32#define CONFIG_SYS_NS16550_REG_SIZE -4
33#define CONFIG_SYS_NS16550_COM1 0x01c20000
34#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
David Brownell28b00322009-05-15 23:48:37 +020035#define CONFIG_CONS_INDEX 1
36#define CONFIG_BAUDRATE 115200
37
38/* Ethernet: external DM9000 */
39#define CONFIG_DRIVER_DM9000 1
40#define CONFIG_DM9000_BASE 0x04014000
41#define DM9000_IO CONFIG_DM9000_BASE
42#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
David Brownell28b00322009-05-15 23:48:37 +020043
44/* I2C */
45#define CONFIG_HARD_I2C
46#define CONFIG_DRIVER_DAVINCI_I2C
47#define CONFIG_SYS_I2C_SPEED 400000
48#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
49
50/* NAND: socketed, two chipselects, normally 2 GBytes */
Sandeep Paulraj409ec372009-09-08 18:08:06 -040051#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050052#define CONFIG_SYS_NAND_CS 2
David Brownell28b00322009-05-15 23:48:37 +020053#define CONFIG_SYS_NAND_USE_FLASH_BBT
Sandeep Paulraj409ec372009-09-08 18:08:06 -040054#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
55#define CONFIG_SYS_NAND_PAGE_2K
David Brownell28b00322009-05-15 23:48:37 +020056
57#define CONFIG_SYS_NAND_LARGEPAGE
58#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
59/* socket has two chipselects, nCE0 gated by address BIT(14) */
60#define CONFIG_SYS_MAX_NAND_DEVICE 1
61#define CONFIG_SYS_NAND_MAX_CHIPS 2
62
Sandeep Paulraj073eacf2010-12-18 18:14:49 -050063/* SD/MMC */
64#define CONFIG_MMC
65#define CONFIG_GENERIC_MMC
66#define CONFIG_DAVINCI_MMC
67#define CONFIG_DAVINCI_MMC_SD1
68#define CONFIG_MMC_MBLOCK
69
David Brownell28b00322009-05-15 23:48:37 +020070/* USB: OTG connector */
71/* NYET -- #define CONFIG_USB_DAVINCI */
72
73/* U-Boot command configuration */
74#include <config_cmd_default.h>
75
76#undef CONFIG_CMD_BDI
77#undef CONFIG_CMD_FLASH
78#undef CONFIG_CMD_FPGA
79#undef CONFIG_CMD_SETGETDCR
80
81#define CONFIG_CMD_ASKENV
82#define CONFIG_CMD_DHCP
83#define CONFIG_CMD_I2C
84#define CONFIG_CMD_PING
85#define CONFIG_CMD_SAVES
86
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +000087#ifdef CONFIG_CMD_BDI
88#define CONFIG_CLOCKS
89#endif
90
Sandeep Paulraj073eacf2010-12-18 18:14:49 -050091#ifdef CONFIG_MMC
92#define CONFIG_DOS_PARTITION
93#define CONFIG_CMD_EXT2
94#define CONFIG_CMD_FAT
95#define CONFIG_CMD_MMC
96#endif
97
David Brownell28b00322009-05-15 23:48:37 +020098#ifdef CONFIG_NAND_DAVINCI
99#define CONFIG_CMD_MTDPARTS
100#define CONFIG_MTD_PARTITIONS
Sandeep Paulraj409ec372009-09-08 18:08:06 -0400101#define CONFIG_MTD_DEVICE
David Brownell28b00322009-05-15 23:48:37 +0200102#define CONFIG_CMD_NAND
103#define CONFIG_CMD_UBI
104#define CONFIG_RBTREE
105#endif
106
David Brownell28b00322009-05-15 23:48:37 +0200107#ifdef CONFIG_USB_DAVINCI
108#define CONFIG_MUSB_HCD
109#define CONFIG_CMD_USB
110#define CONFIG_USB_STORAGE
111#else
112#undef CONFIG_MUSB_HCD
113#undef CONFIG_CMD_USB
114#undef CONFIG_USB_STORAGE
115#endif
116
117#define CONFIG_CRC32_VERIFY
118#define CONFIG_MX_CYCLIC
119
120/* U-Boot general configuration */
David Brownell28b00322009-05-15 23:48:37 +0200121#define CONFIG_BOOTFILE "uImage" /* Boot file name */
122#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
123#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
124#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
125 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
126#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
127#define CONFIG_SYS_HUSH_PARSER
David Brownell28b00322009-05-15 23:48:37 +0200128#define CONFIG_SYS_LONGHELP
129
Sandeep Paulraj409ec372009-09-08 18:08:06 -0400130#ifdef CONFIG_NAND_DAVINCI
131#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
132#define CONFIG_ENV_IS_IN_NAND
133#define CONFIG_ENV_OFFSET 0x3C0000
134#undef CONFIG_ENV_IS_IN_FLASH
135#endif
David Brownell28b00322009-05-15 23:48:37 +0200136
Sandeep Paulraj073eacf2010-12-18 18:14:49 -0500137#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
138#define CONFIG_CMD_ENV
139#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
140#define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
141#define CONFIG_ENV_IS_IN_MMC
142#undef CONFIG_ENV_IS_IN_FLASH
143#endif
144
Sandeep Paulraj409ec372009-09-08 18:08:06 -0400145#define CONFIG_BOOTDELAY 5
David Brownell28b00322009-05-15 23:48:37 +0200146#define CONFIG_BOOTCOMMAND \
147 "dhcp;bootm"
148#define CONFIG_BOOTARGS \
149 "console=ttyS0,115200n8 " \
150 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
151
152#define CONFIG_CMDLINE_EDITING
153#define CONFIG_VERSION_VARIABLE
154#define CONFIG_TIMESTAMP
155
156#define CONFIG_NET_RETRY_COUNT 10
157
158/* U-Boot memory configuration */
Sandeep Paulraj409ec372009-09-08 18:08:06 -0400159#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
David Brownell28b00322009-05-15 23:48:37 +0200160#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
161#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
162
163/* Linux interfacing */
164#define CONFIG_CMDLINE_TAG
165#define CONFIG_SETUP_MEMORY_TAGS
166#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
167#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
168
169
170/* NAND configuration ... socketed with two chipselects. It normally comes
171 * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
172 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
173 * pretty much demands the 4-bit ECC support.) You can of course swap in
174 * other parts, including small page ones.
175 *
176 * This presents a single read-only partition for all bootloader stuff.
177 * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
178 * some extra space to help cope with bad blocks in that data. Linux
179 * shouldn't care about its detailed layout, and will probably want to use
180 * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to
181 * override this default partitioning using MTDPARTS and cmdlinepart.
182 */
183#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
184
185#ifdef CONFIG_SYS_NAND_LARGEPAGE
186/* Use same layout for 128K/256K blocks; allow some bad blocks */
187#define PART_BOOT "2m(bootloader)ro,"
188#else
189/* Assume 16K erase blocks; allow a few bad ones. */
190#define PART_BOOT "512k(bootloader)ro,"
191#endif
192
193#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
194#define PART_REST "-(filesystem)"
195
196#define MTDPARTS_DEFAULT \
197 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
198
Sandeep Paulraj44df8602010-11-27 18:49:49 -0500199#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
200
201#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
202#define CONFIG_SYS_INIT_SP_ADDR \
203 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
204
David Brownell28b00322009-05-15 23:48:37 +0200205#endif /* __CONFIG_H */