Igor Grinberg | b09bf72 | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2013 CompuLab, Ltd. |
| 3 | * Author: Igor Grinberg <grinberg@compulab.co.il> |
| 4 | * |
| 5 | * Configuration settings for the CompuLab CM-T3517 board |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | /* |
| 14 | * High Level Configuration Options |
| 15 | */ |
| 16 | #define CONFIG_OMAP /* in a TI OMAP core */ |
| 17 | #define CONFIG_CM_T3517 /* working with CM-T3517 */ |
| 18 | #define CONFIG_OMAP_COMMON |
| 19 | #define CONFIG_SYS_GENERIC_BOARD |
| 20 | |
| 21 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
| 22 | |
| 23 | /* |
| 24 | * This is needed for the DMA stuff. |
| 25 | * Although the default iss 64, we still define it |
| 26 | * to be on the safe side once the default is changed. |
| 27 | */ |
| 28 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
| 29 | |
| 30 | #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ |
| 31 | |
| 32 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 33 | #include <asm/arch/omap3.h> |
| 34 | |
| 35 | /* |
| 36 | * Display CPU and Board information |
| 37 | */ |
| 38 | #define CONFIG_DISPLAY_CPUINFO |
| 39 | #define CONFIG_DISPLAY_BOARDINFO |
| 40 | |
| 41 | /* Clock Defines */ |
| 42 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 43 | #define V_SCLK (V_OSCK >> 1) |
| 44 | |
| 45 | #define CONFIG_MISC_INIT_R |
| 46 | |
| 47 | #define CONFIG_OF_LIBFDT |
| 48 | /* |
| 49 | * The early kernel mapping on ARM currently only maps from the base of DRAM |
| 50 | * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. |
| 51 | * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, |
| 52 | * so that leaves DRAM base to DRAM base + 0x4000 available. |
| 53 | */ |
| 54 | #define CONFIG_SYS_BOOTMAPSZ 0x4000 |
| 55 | |
| 56 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 57 | #define CONFIG_SETUP_MEMORY_TAGS |
| 58 | #define CONFIG_INITRD_TAG |
| 59 | #define CONFIG_REVISION_TAG |
| 60 | #define CONFIG_SERIAL_TAG |
| 61 | |
| 62 | /* |
| 63 | * Size of malloc() pool |
| 64 | */ |
| 65 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ |
| 66 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
| 67 | |
| 68 | /* |
| 69 | * Hardware drivers |
| 70 | */ |
| 71 | |
| 72 | /* |
| 73 | * NS16550 Configuration |
| 74 | */ |
| 75 | #define CONFIG_SYS_NS16550 |
| 76 | #define CONFIG_SYS_NS16550_SERIAL |
| 77 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 78 | #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 79 | |
| 80 | /* |
| 81 | * select serial console configuration |
| 82 | */ |
| 83 | #define CONFIG_CONS_INDEX 3 |
| 84 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 85 | #define CONFIG_SERIAL3 3 /* UART3 */ |
| 86 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
| 87 | |
| 88 | /* allow to overwrite serial and ethaddr */ |
| 89 | #define CONFIG_ENV_OVERWRITE |
| 90 | #define CONFIG_BAUDRATE 115200 |
| 91 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 92 | 115200} |
| 93 | |
| 94 | #define CONFIG_OMAP_GPIO |
| 95 | |
| 96 | #define CONFIG_GENERIC_MMC |
| 97 | #define CONFIG_MMC |
| 98 | #define CONFIG_OMAP_HSMMC |
| 99 | #define CONFIG_DOS_PARTITION |
| 100 | |
Igor Grinberg | 011f5c1 | 2014-11-03 11:32:25 +0200 | [diff] [blame] | 101 | /* USB */ |
| 102 | #define CONFIG_USB_MUSB_AM35X |
| 103 | |
| 104 | #ifndef CONFIG_USB_MUSB_AM35X |
| 105 | #define CONFIG_USB_OMAP3 |
| 106 | #define CONFIG_USB_EHCI |
| 107 | #define CONFIG_USB_EHCI_OMAP |
| 108 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 |
| 109 | #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 |
| 110 | #else /* !CONFIG_USB_MUSB_AM35X */ |
| 111 | #define CONFIG_MUSB_HOST |
| 112 | #define CONFIG_MUSB_PIO_ONLY |
| 113 | #endif /* CONFIG_USB_MUSB_AM35X */ |
| 114 | |
| 115 | #define CONFIG_USB_STORAGE |
| 116 | #define CONFIG_CMD_USB |
| 117 | |
Igor Grinberg | b09bf72 | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 118 | /* commands to include */ |
| 119 | #include <config_cmd_default.h> |
| 120 | |
| 121 | #define CONFIG_CMD_CACHE |
| 122 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
| 123 | #define CONFIG_CMD_FAT /* FAT support */ |
| 124 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
| 125 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 126 | #define CONFIG_MTD_PARTITIONS |
| 127 | #define MTDIDS_DEFAULT "nand0=nand" |
| 128 | #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ |
| 129 | "1920k(u-boot),256k(u-boot-env),"\ |
| 130 | "4m(kernel),-(fs)" |
| 131 | |
| 132 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
| 133 | #define CONFIG_CMD_MMC /* MMC support */ |
| 134 | #define CONFIG_CMD_NAND /* NAND support */ |
Igor Grinberg | a8a78c7 | 2014-11-03 11:32:26 +0200 | [diff] [blame] | 135 | #define CONFIG_CMD_DHCP |
| 136 | #define CONFIG_CMD_PING |
Igor Grinberg | b09bf72 | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 137 | #define CONFIG_CMD_GPIO |
| 138 | |
| 139 | #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
| 140 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
| 141 | #undef CONFIG_CMD_IMLS /* List all found images */ |
| 142 | |
| 143 | #define CONFIG_SYS_NO_FLASH |
| 144 | #define CONFIG_SYS_I2C |
| 145 | #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 |
| 146 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
| 147 | #define CONFIG_SYS_I2C_OMAP34XX |
| 148 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 149 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 150 | #define CONFIG_SYS_I2C_EEPROM_BUS 0 |
| 151 | #define CONFIG_I2C_MULTI_BUS |
| 152 | |
| 153 | /* |
| 154 | * Board NAND Info. |
| 155 | */ |
| 156 | #define CONFIG_SYS_NAND_QUIET_TEST |
| 157 | #define CONFIG_NAND_OMAP_GPMC |
| 158 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
| 159 | /* to access nand */ |
| 160 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 161 | /* to access nand at */ |
| 162 | /* CS0 */ |
| 163 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
| 164 | /* devices */ |
| 165 | |
| 166 | /* Environment information */ |
| 167 | #define CONFIG_BOOTDELAY 3 |
| 168 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
| 169 | |
| 170 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 171 | "loadaddr=0x82000000\0" \ |
| 172 | "baudrate=115200\0" \ |
| 173 | "console=ttyO2,115200n8\0" \ |
| 174 | "mpurate=auto\0" \ |
| 175 | "vram=12M\0" \ |
| 176 | "dvimode=1024x768MR-16@60\0" \ |
| 177 | "defaultdisplay=dvi\0" \ |
| 178 | "mmcdev=0\0" \ |
| 179 | "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ |
| 180 | "mmcrootfstype=ext4\0" \ |
| 181 | "nandroot=/dev/mtdblock4 rw\0" \ |
| 182 | "nandrootfstype=ubifs\0" \ |
| 183 | "mmcargs=setenv bootargs console=${console} " \ |
| 184 | "mpurate=${mpurate} " \ |
| 185 | "vram=${vram} " \ |
| 186 | "omapfb.mode=dvi:${dvimode} " \ |
| 187 | "omapdss.def_disp=${defaultdisplay} " \ |
| 188 | "root=${mmcroot} " \ |
| 189 | "rootfstype=${mmcrootfstype}\0" \ |
| 190 | "nandargs=setenv bootargs console=${console} " \ |
| 191 | "mpurate=${mpurate} " \ |
| 192 | "vram=${vram} " \ |
| 193 | "omapfb.mode=dvi:${dvimode} " \ |
| 194 | "omapdss.def_disp=${defaultdisplay} " \ |
| 195 | "root=${nandroot} " \ |
| 196 | "rootfstype=${nandrootfstype}\0" \ |
| 197 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 198 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 199 | "source ${loadaddr}\0" \ |
| 200 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ |
| 201 | "mmcboot=echo Booting from mmc ...; " \ |
| 202 | "run mmcargs; " \ |
| 203 | "bootm ${loadaddr}\0" \ |
| 204 | "nandboot=echo Booting from nand ...; " \ |
| 205 | "run nandargs; " \ |
| 206 | "nand read ${loadaddr} 2a0000 400000; " \ |
| 207 | "bootm ${loadaddr}\0" \ |
| 208 | |
| 209 | #define CONFIG_CMD_BOOTZ |
| 210 | #define CONFIG_BOOTCOMMAND \ |
| 211 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
| 212 | "if run loadbootscript; then " \ |
| 213 | "run bootscript; " \ |
| 214 | "else " \ |
| 215 | "if run loaduimage; then " \ |
| 216 | "run mmcboot; " \ |
| 217 | "else run nandboot; " \ |
| 218 | "fi; " \ |
| 219 | "fi; " \ |
| 220 | "else run nandboot; fi" |
| 221 | |
| 222 | /* |
| 223 | * Miscellaneous configurable options |
| 224 | */ |
| 225 | #define CONFIG_AUTO_COMPLETE |
| 226 | #define CONFIG_CMDLINE_EDITING |
| 227 | #define CONFIG_TIMESTAMP |
| 228 | #define CONFIG_SYS_AUTOLOAD "no" |
| 229 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 230 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 231 | #define CONFIG_SYS_PROMPT "CM-T3517 # " |
| 232 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| 233 | /* Print Buffer Size */ |
| 234 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 235 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 236 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 237 | /* Boot Argument Buffer Size */ |
| 238 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 239 | |
| 240 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) |
| 241 | |
| 242 | /* |
| 243 | * AM3517 has 12 GP timers, they can be driven by the system clock |
| 244 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 245 | * This rate is divided by a local divisor. |
| 246 | */ |
| 247 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 248 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 249 | #define CONFIG_SYS_HZ 1000 |
| 250 | |
| 251 | /*----------------------------------------------------------------------- |
| 252 | * Physical Memory Map |
| 253 | */ |
| 254 | #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ |
| 255 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 256 | #define CONFIG_SYS_CS0_SIZE (256 << 20) |
| 257 | |
| 258 | /*----------------------------------------------------------------------- |
| 259 | * FLASH and environment organization |
| 260 | */ |
| 261 | |
| 262 | /* **** PISMO SUPPORT *** */ |
| 263 | /* Monitor at start of flash */ |
| 264 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 265 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
| 266 | |
| 267 | #define CONFIG_ENV_IS_IN_NAND |
| 268 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 269 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
| 270 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
| 271 | |
Igor Grinberg | a8a78c7 | 2014-11-03 11:32:26 +0200 | [diff] [blame] | 272 | #if defined(CONFIG_CMD_NET) |
| 273 | #define CONFIG_DRIVER_TI_EMAC |
| 274 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 275 | #define CONFIG_MII |
| 276 | #define CONFIG_SMC911X |
| 277 | #define CONFIG_SMC911X_32_BIT |
| 278 | #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20)) |
| 279 | #endif /* CONFIG_CMD_NET */ |
| 280 | |
Igor Grinberg | b09bf72 | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 281 | /* additions for new relocation code, must be added to all boards */ |
| 282 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 283 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 284 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 285 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 286 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 287 | GENERATED_GBL_DATA_SIZE) |
| 288 | |
| 289 | /* Status LED */ |
| 290 | #define CONFIG_STATUS_LED /* Status LED enabled */ |
| 291 | #define CONFIG_BOARD_SPECIFIC_LED |
| 292 | #define CONFIG_GPIO_LED |
| 293 | #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ |
| 294 | #define GREEN_LED_DEV 0 |
| 295 | #define STATUS_LED_BIT GREEN_LED_GPIO |
| 296 | #define STATUS_LED_STATE STATUS_LED_ON |
| 297 | #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) |
| 298 | #define STATUS_LED_BOOT GREEN_LED_DEV |
| 299 | |
| 300 | /* GPIO banks */ |
| 301 | #ifdef CONFIG_STATUS_LED |
| 302 | #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ |
| 303 | #endif |
| 304 | |
Igor Grinberg | 40bbd52 | 2014-11-03 11:32:27 +0200 | [diff] [blame] | 305 | /* Display Configuration */ |
| 306 | #define CONFIG_OMAP3_GPIO_2 |
| 307 | #define CONFIG_OMAP3_GPIO_5 |
| 308 | #define CONFIG_VIDEO_OMAP3 |
| 309 | #define LCD_BPP LCD_COLOR16 |
| 310 | |
| 311 | #define CONFIG_LCD |
| 312 | #define CONFIG_SPLASH_SCREEN |
| 313 | #define CONFIG_SPLASHIMAGE_GUARD |
| 314 | #define CONFIG_CMD_BMP |
| 315 | #define CONFIG_BMP_16BPP |
| 316 | #define CONFIG_SCF0403_LCD |
| 317 | |
| 318 | #define CONFIG_OMAP3_SPI |
| 319 | |
Igor Grinberg | b09bf72 | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 320 | #endif /* __CONFIG_H */ |