Kyle Moffett | f8bbb4d | 2011-12-07 16:39:16 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2009-2011 eXMeritus, A Boeing Company |
| 3 | * Copyright 2007-2009 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <command.h> |
| 26 | #include <pci.h> |
| 27 | #include <asm/processor.h> |
| 28 | #include <asm/mmu.h> |
| 29 | #include <asm/cache.h> |
| 30 | #include <asm/immap_85xx.h> |
| 31 | #include <asm/fsl_pci.h> |
| 32 | #include <asm/fsl_ddr_sdram.h> |
| 33 | #include <asm/io.h> |
| 34 | #include <miiphy.h> |
| 35 | #include <libfdt.h> |
| 36 | #include <linux/ctype.h> |
| 37 | #include <fdt_support.h> |
| 38 | #include <fsl_mdio.h> |
| 39 | #include <tsec.h> |
| 40 | #include <asm/fsl_law.h> |
| 41 | #include <netdev.h> |
| 42 | #include <malloc.h> |
| 43 | #include <i2c.h> |
| 44 | #include <pca953x.h> |
| 45 | |
| 46 | #include "gpios.h" |
| 47 | |
| 48 | DECLARE_GLOBAL_DATA_PTR; |
| 49 | |
| 50 | int checkboard(void) |
| 51 | { |
| 52 | unsigned int gpio_high = 0; |
| 53 | unsigned int gpio_low = 0; |
| 54 | unsigned int gpio_in = 0; |
| 55 | unsigned int i; |
| 56 | |
| 57 | puts("Board: HWW-1U-1A "); |
| 58 | |
| 59 | /* |
| 60 | * First just figure out which CPU we're on, then use that to |
| 61 | * configure the lists of other GPIOs to be programmed. |
| 62 | */ |
| 63 | mpc85xx_gpio_set_in(GPIO_CPU_ID); |
| 64 | if (hww1u1a_is_cpu_a()) { |
| 65 | puts("CPU A\n"); |
| 66 | |
| 67 | /* We want to turn on some LEDs */ |
| 68 | gpio_high |= GPIO_CPUA_CPU_READY; |
| 69 | gpio_low |= GPIO_CPUA_DEBUG_LED1; |
| 70 | gpio_low |= GPIO_CPUA_DEBUG_LED2; |
| 71 | |
| 72 | /* Disable the unused transmitters */ |
| 73 | gpio_low |= GPIO_CPUA_TDIS1A; |
| 74 | gpio_high |= GPIO_CPUA_TDIS1B; |
| 75 | gpio_low |= GPIO_CPUA_TDIS2A; |
| 76 | gpio_high |= GPIO_CPUA_TDIS2B; |
| 77 | } else { |
| 78 | puts("CPU B\n"); |
| 79 | |
| 80 | /* We want to turn on some LEDs */ |
| 81 | gpio_high |= GPIO_CPUB_CPU_READY; |
| 82 | gpio_low |= GPIO_CPUB_DEBUG_LED1; |
| 83 | gpio_low |= GPIO_CPUB_DEBUG_LED2; |
| 84 | |
| 85 | /* Enable the appropriate receivers */ |
| 86 | gpio_high |= GPIO_CPUB_RMUX_SEL0A; |
| 87 | gpio_high |= GPIO_CPUB_RMUX_SEL0B; |
| 88 | gpio_low |= GPIO_CPUB_RMUX_SEL1A; |
| 89 | gpio_low |= GPIO_CPUB_RMUX_SEL1B; |
| 90 | } |
| 91 | |
| 92 | /* These GPIOs are common */ |
| 93 | gpio_in |= IRQ_I2CINT | IRQ_FANINT | IRQ_DIMM_EVENT; |
| 94 | gpio_low |= GPIO_RS422_RE; |
| 95 | gpio_high |= GPIO_RS422_DE; |
| 96 | |
| 97 | /* Ok, now go ahead and program all of those in one go */ |
| 98 | mpc85xx_gpio_set(gpio_high|gpio_low|gpio_in, |
| 99 | gpio_high|gpio_low, |
| 100 | gpio_high); |
| 101 | |
| 102 | /* |
| 103 | * If things have been taken out of reset early (for example, by one |
| 104 | * of the BDI3000 debuggers), then we need to put them back in reset |
| 105 | * and delay a while before we continue. |
| 106 | */ |
| 107 | if (mpc85xx_gpio_get(GPIO_RESETS)) { |
Andy Fleming | e76cd5d | 2012-10-23 19:03:46 -0500 | [diff] [blame] | 108 | ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR; |
Kyle Moffett | f8bbb4d | 2011-12-07 16:39:16 -0500 | [diff] [blame] | 109 | |
| 110 | puts("Debugger detected... extra device reset enabled!\n"); |
| 111 | |
| 112 | /* Put stuff into reset and disable the DDR controller */ |
| 113 | mpc85xx_gpio_set_low(GPIO_RESETS); |
| 114 | out_be32(&ddr->sdram_cfg, 0x00000000); |
| 115 | |
| 116 | puts(" Waiting 1 sec for reset..."); |
| 117 | for (i = 0; i < 10; i++) { |
| 118 | udelay(100000); |
| 119 | puts("."); |
| 120 | } |
| 121 | puts("\n"); |
| 122 | } |
| 123 | |
| 124 | /* Now bring everything back out of reset again */ |
| 125 | mpc85xx_gpio_set_high(GPIO_RESETS); |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | /* |
| 130 | * This little shell function just returns whether or not it's CPU A. |
| 131 | * It can be used to select the right device-tree when booting, etc. |
| 132 | */ |
| 133 | int do_hww1u1a_test_cpu_a(cmd_tbl_t *cmdtp, int flag, |
| 134 | int argc, char * const argv[]) |
| 135 | { |
| 136 | if (argc > 1) |
| 137 | cmd_usage(cmdtp); |
| 138 | |
| 139 | if (hww1u1a_is_cpu_a()) |
| 140 | return 0; |
| 141 | else |
| 142 | return 1; |
| 143 | } |
| 144 | U_BOOT_CMD( |
| 145 | test_cpu_a, 1, 0, do_hww1u1a_test_cpu_a, |
| 146 | "Test if this is CPU A (versus B) on the eXMeritus HWW-1U-1A board", |
| 147 | "" |
| 148 | ); |
| 149 | |
| 150 | /* Create a prompt-like string: "uboot@HOSTNAME% " */ |
| 151 | #define PROMPT_PREFIX "uboot@exm" |
| 152 | #define PROMPT_SUFFIX "% " |
| 153 | |
| 154 | /* This function returns a PS1 prompt based on the serial number */ |
| 155 | static char *hww1u1a_prompt; |
| 156 | const char *hww1u1a_get_ps1(void) |
| 157 | { |
| 158 | unsigned long len, i, j; |
| 159 | const char *serialnr; |
| 160 | |
| 161 | /* If our prompt was already set, just use that */ |
| 162 | if (hww1u1a_prompt) |
| 163 | return hww1u1a_prompt; |
| 164 | |
| 165 | /* Use our serial number if present, otherwise a default */ |
| 166 | serialnr = getenv("serial#"); |
| 167 | if (!serialnr || !serialnr[0]) |
| 168 | serialnr = "999999-X"; |
| 169 | |
| 170 | /* |
| 171 | * We will turn the serial number into a hostname by: |
| 172 | * (A) Delete all non-alphanumerics. |
| 173 | * (B) Lowercase all letters. |
| 174 | * (C) Prefix "exm". |
| 175 | * (D) Suffix "a" for CPU A and "b" for CPU B. |
| 176 | */ |
| 177 | for (i = 0, len = 0; serialnr[i]; i++) { |
| 178 | if (isalnum(serialnr[i])) |
| 179 | len++; |
| 180 | } |
| 181 | |
| 182 | len += sizeof(PROMPT_PREFIX PROMPT_SUFFIX) + 1; /* Includes NUL */ |
| 183 | hww1u1a_prompt = malloc(len); |
| 184 | if (!hww1u1a_prompt) |
| 185 | return PROMPT_PREFIX "UNKNOWN(ENOMEM)" PROMPT_SUFFIX; |
| 186 | |
| 187 | /* Now actually fill it in */ |
| 188 | i = 0; |
| 189 | |
| 190 | /* Handle the prefix */ |
| 191 | for (j = 0; j < sizeof(PROMPT_PREFIX) - 1; j++) |
| 192 | hww1u1a_prompt[i++] = PROMPT_PREFIX[j]; |
| 193 | |
| 194 | /* Now the serial# part of the hostname */ |
| 195 | for (j = 0; serialnr[j]; j++) |
| 196 | if (isalnum(serialnr[j])) |
| 197 | hww1u1a_prompt[i++] = tolower(serialnr[j]); |
| 198 | |
| 199 | /* Now the CPU id ("a" or "b") */ |
| 200 | hww1u1a_prompt[i++] = hww1u1a_is_cpu_a() ? 'a' : 'b'; |
| 201 | |
| 202 | /* Finally the suffix */ |
| 203 | for (j = 0; j < sizeof(PROMPT_SUFFIX); j++) |
| 204 | hww1u1a_prompt[i++] = PROMPT_SUFFIX[j]; |
| 205 | |
| 206 | /* This should all have added up, but just in case */ |
| 207 | hww1u1a_prompt[len - 1] = '\0'; |
| 208 | |
| 209 | /* Now we're done */ |
| 210 | return hww1u1a_prompt; |
| 211 | } |
| 212 | |
| 213 | void pci_init_board(void) |
| 214 | { |
| 215 | fsl_pcie_init_board(0); |
| 216 | } |
| 217 | |
| 218 | int board_early_init_r(void) |
| 219 | { |
| 220 | const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; |
| 221 | const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); |
| 222 | |
| 223 | /* |
| 224 | * Remap bootflash region to caching-inhibited |
| 225 | * so that flash can be erased properly. |
| 226 | */ |
| 227 | |
| 228 | /* Flush d-cache and invalidate i-cache of any FLASH data */ |
| 229 | flush_dcache(); |
| 230 | invalidate_icache(); |
| 231 | |
| 232 | /* invalidate existing TLB entry for FLASH */ |
| 233 | disable_tlb(flash_esel); |
| 234 | |
| 235 | set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, |
| 236 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
| 237 | 0, flash_esel, BOOKE_PAGESZ_256M, 1); |
| 238 | |
| 239 | return 0; |
| 240 | } |
| 241 | |
| 242 | int board_eth_init(bd_t *bis) |
| 243 | { |
| 244 | struct tsec_info_struct tsec_info[4]; |
| 245 | struct fsl_pq_mdio_info mdio_info; |
| 246 | |
| 247 | SET_STD_TSEC_INFO(tsec_info[0], 1); |
| 248 | SET_STD_TSEC_INFO(tsec_info[1], 2); |
| 249 | SET_STD_TSEC_INFO(tsec_info[2], 3); |
| 250 | |
| 251 | if (hww1u1a_is_cpu_a()) |
| 252 | tsec_info[2].phyaddr = TSEC3_PHY_ADDR_CPUA; |
| 253 | else |
| 254 | tsec_info[2].phyaddr = TSEC3_PHY_ADDR_CPUB; |
| 255 | |
| 256 | mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; |
| 257 | mdio_info.name = DEFAULT_MII_NAME; |
| 258 | fsl_pq_mdio_init(bis, &mdio_info); |
| 259 | |
| 260 | tsec_eth_init(bis, tsec_info, 3); |
| 261 | return pci_eth_init(bis); |
| 262 | } |
| 263 | |
| 264 | void ft_board_setup(void *blob, bd_t *bd) |
| 265 | { |
| 266 | phys_addr_t base; |
| 267 | phys_size_t size; |
| 268 | |
| 269 | ft_cpu_setup(blob, bd); |
| 270 | |
| 271 | base = getenv_bootm_low(); |
| 272 | size = getenv_bootm_size(); |
| 273 | |
| 274 | fdt_fixup_memory(blob, (u64)base, (u64)size); |
| 275 | |
| 276 | FT_FSL_PCI_SETUP; |
| 277 | } |